From 60703a81e2a1a34dc8928e68d6ba5a398254d95e Mon Sep 17 00:00:00 2001 From: Cliff Huang Date: Thu, 2 Mar 2023 10:22:04 -0800 Subject: mb/intel/adlrvp: Enable RTD3 root port mutex for WWAN MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This adds RTD3 RPMX mutex to the root port. It is shared between RTD3 and WWAN. The purpose of using this mutex is to prevent OSPM from calling _ON and _OFF methods while WWAN kernel driver is calling _RST, which accesses the GPIO pins. BUG=NA BRANCH=firmware-brya-14505.B TEST=boot to OS and check the generated SSDT table for the root port. The RPMX mutex should be generated under the root port. Signed-off-by: Cliff Huang Change-Id: I809eb84cb1a09deb168040e83041b65237a1b576 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73383 Reviewed-by: Jérémy Compostella Tested-by: build bot (Jenkins) Reviewed-by: Bora Guvendik --- src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb | 1 + src/mainboard/intel/adlrvp/variants/adlrvp_rpl_ext_ec/overridetree.cb | 1 + 2 files changed, 2 insertions(+) (limited to 'src/mainboard/intel') diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb index 544f9e251be2..fc4c11c496eb 100644 --- a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb +++ b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb @@ -70,6 +70,7 @@ chip soc/intel/alderlake register "srcclk_pin" = "5" register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL" register "skip_on_off_support" = "true" + register "use_rp_mutex" = "true" device generic 0 alias rp6_rtd3 on end end diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_rpl_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_rpl_ext_ec/overridetree.cb index 544f9e251be2..fc4c11c496eb 100644 --- a/src/mainboard/intel/adlrvp/variants/adlrvp_rpl_ext_ec/overridetree.cb +++ b/src/mainboard/intel/adlrvp/variants/adlrvp_rpl_ext_ec/overridetree.cb @@ -70,6 +70,7 @@ chip soc/intel/alderlake register "srcclk_pin" = "5" register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL" register "skip_on_off_support" = "true" + register "use_rp_mutex" = "true" device generic 0 alias rp6_rtd3 on end end -- cgit v1.2.3