From bb73c98d24f10941b060df983b0c8b7169f6a25e Mon Sep 17 00:00:00 2001 From: Keith Hui Date: Sun, 13 Aug 2017 16:31:18 -0400 Subject: Boards w/ Winbond superios: Use common config entry code Six mainboards with Winbond superios directly configure them in romstage.c. All use the common Winbond romstage code. Change them to use the common config entry code to allow for code refactoring such as [1]. Build tested. [1] https://review.coreboot.org/20988 Change-Id: Icecd52ec622b9da86edb07c52893f4db001e5562 Signed-off-by: Keith Hui Reviewed-on: https://review.coreboot.org/20989 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Arthur Heymans --- src/mainboard/nvidia/l1_2pvv/romstage.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard/nvidia/l1_2pvv/romstage.c') diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c index d8076f0b7932..c2fd79858cd9 100644 --- a/src/mainboard/nvidia/l1_2pvv/romstage.c +++ b/src/mainboard/nvidia/l1_2pvv/romstage.c @@ -124,9 +124,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); - pnp_enter_ext_func_mode(SERIAL_DEV); + pnp_enter_conf_state(SERIAL_DEV); pnp_write_config(SERIAL_DEV, 0x24, 0); - pnp_exit_ext_func_mode(SERIAL_DEV); + pnp_exit_conf_state(SERIAL_DEV); setup_mb_resource_map(); -- cgit v1.2.3