From d5d6ecf63a87eb110f74dae9aa542eb9ee1872a8 Mon Sep 17 00:00:00 2001 From: Ian Feng Date: Thu, 5 Jan 2023 10:09:15 +0800 Subject: mb/google/nissa/var/xivu: Update DPTF parameters Follow thermal table from thermal team. 1. Enable TS3 thermal sensor. 2. Set TS3 passive policy to 63. 3. Set TS3 critical policy to 73. 4. Modify TSR2 passive policy to CPU. BUG=b:263554342 TEST=emerge-nissa coreboot chromeos-bootimage Change-Id: Ia1fcaee15a8b58b755ce0a48a1978e795b66efd7 Signed-off-by: Ian Feng Reviewed-on: https://review.coreboot.org/c/coreboot/+/71658 Reviewed-by: Reka Norman Tested-by: build bot (Jenkins) Reviewed-by: Sumeet R Pawnikar Reviewed-by: AlanKY Lee Reviewed-by: Dtrain Hsu Reviewed-by: Eric Lai --- src/mainboard/google/brya/variants/xivu/overridetree.cb | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/brya/variants/xivu/overridetree.cb b/src/mainboard/google/brya/variants/xivu/overridetree.cb index bfaa639f4110..e98750cd3ced 100644 --- a/src/mainboard/google/brya/variants/xivu/overridetree.cb +++ b/src/mainboard/google/brya/variants/xivu/overridetree.cb @@ -145,7 +145,8 @@ chip soc/intel/alderlake ## sensor information register "options.tsr[0].desc" = ""Memory"" register "options.tsr[1].desc" = ""Ambient"" - register "options.tsr[2].desc" = ""Charger"" + register "options.tsr[2].desc" = ""ChargerMB"" + register "options.tsr[3].desc" = ""ChargerSUB"" # TODO: below values are initial reference values only ## Passive Policy @@ -153,7 +154,8 @@ chip soc/intel/alderlake [0] = DPTF_PASSIVE(CPU, CPU, 90, 5000), [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 77, 5000), [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 68, 5000), - [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 78, 5000), + [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 78, 5000), + [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 63, 5000), }" ## Critical Policy @@ -161,6 +163,7 @@ chip soc/intel/alderlake [0] = DPTF_CRITICAL(TEMP_SENSOR_0, 87, SHUTDOWN), [1] = DPTF_CRITICAL(TEMP_SENSOR_1, 78, SHUTDOWN), [2] = DPTF_CRITICAL(TEMP_SENSOR_2, 88, SHUTDOWN), + [3] = DPTF_CRITICAL(TEMP_SENSOR_3, 73, SHUTDOWN), }" register "controls.power_limits" = "{ -- cgit v1.2.3