From 88af0f38eb19f956e8df2b62254c10c7603a9a33 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sun, 3 Jun 2018 12:37:54 +0200 Subject: cpu/intel/haswell: Switch to POSTCAR_STAGE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Tested on Google Peppy (Acer C720). Change-Id: I1802547d7a5b3875689cc4e126e7c189a75defa9 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/26793 Reviewed-by: Matt DeVillier Reviewed-by: Kyösti Mälkki Tested-by: build bot (Jenkins) --- src/northbridge/intel/haswell/Kconfig | 2 ++ src/northbridge/intel/haswell/Makefile.inc | 2 ++ 2 files changed, 4 insertions(+) (limited to 'src/northbridge/intel') diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig index 5c8caea92d86..5e6956edf0e8 100644 --- a/src/northbridge/intel/haswell/Kconfig +++ b/src/northbridge/intel/haswell/Kconfig @@ -21,6 +21,8 @@ config NORTHBRIDGE_INTEL_HASWELL select INTEL_GMA_ACPI select RELOCATABLE_RAMSTAGE select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM + select POSTCAR_STAGE + select POSTCAR_CONSOLE if NORTHBRIDGE_INTEL_HASWELL diff --git a/src/northbridge/intel/haswell/Makefile.inc b/src/northbridge/intel/haswell/Makefile.inc index c6d6b2eee8d0..055c2a8a0d62 100644 --- a/src/northbridge/intel/haswell/Makefile.inc +++ b/src/northbridge/intel/haswell/Makefile.inc @@ -36,4 +36,6 @@ mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE)) mrc.bin-position := 0xfffa0000 mrc.bin-type := mrc +postcar-y += ram_calc.c + endif -- cgit v1.2.3