From 9ec7227c9b43df97e3422877b2539db21d47741b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Sun, 17 Oct 2021 08:34:31 +0300
Subject: cpu/x86/lapic: Move LAPIC configuration to MP init
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Implementation for setup_lapic() did two things -- call
enable_lapic() and virtual_wire_mode_init().

In PARALLEL_MP case enable_lapic() was redundant as it
was already executed prior to initialize_cpu() call.
For the !PARALLEL_MP case enable_lapic() is added to
AP CPUs.

Change-Id: I5caf94315776a499e9cf8f007251b61f51292dc5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58387
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
---
 src/soc/amd/stoneyridge/cpu.c | 2 --
 1 file changed, 2 deletions(-)

(limited to 'src/soc/amd/stoneyridge')

diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c
index 6be76bfde8d9..3cd3a9580ae1 100644
--- a/src/soc/amd/stoneyridge/cpu.c
+++ b/src/soc/amd/stoneyridge/cpu.c
@@ -9,7 +9,6 @@
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/smm.h>
-#include <cpu/x86/lapic.h>
 #include <device/device.h>
 #include <device/pci_ops.h>
 #include <soc/pci_devs.h>
@@ -65,7 +64,6 @@ void mp_init_cpus(struct bus *cpu_bus)
 static void model_15_init(struct device *dev)
 {
 	check_mca();
-	setup_lapic();
 
 	/*
 	 * Per AMD, sync an undocumented MSR with the PSP base address.
-- 
cgit v1.2.3