From fbfb906081f9eb5b1d94346b27f4d33ab37e45ec Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 15 Dec 2021 19:35:00 +0100 Subject: soc/amd/stoneyridge: factor out early AOAC initialization Factor out enable_aoac_devices out of southbridge.c to aoac.c to align Stoneyridge more with Picasso and Cezanne. Signed-off-by: Felix Held Change-Id: Ied4d821138507639cad1794f6c5017b5873b761f Reviewed-on: https://review.coreboot.org/c/coreboot/+/60140 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson --- src/soc/amd/stoneyridge/Makefile.inc | 1 + src/soc/amd/stoneyridge/aoac.c | 39 +++++++++++++++++++++++++++++++++++ src/soc/amd/stoneyridge/southbridge.c | 33 ----------------------------- 3 files changed, 40 insertions(+), 33 deletions(-) create mode 100644 src/soc/amd/stoneyridge/aoac.c (limited to 'src/soc/amd/stoneyridge') diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 16d1eaac7cd8..4a0eafd26721 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -4,6 +4,7 @@ ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE),y) subdirs-y += ../../../cpu/amd/mtrr/ +bootblock-y += aoac.c bootblock-y += uart.c bootblock-y += BiosCallOuts.c bootblock-y += bootblock.c diff --git a/src/soc/amd/stoneyridge/aoac.c b/src/soc/amd/stoneyridge/aoac.c new file mode 100644 index 000000000000..7c1d12ddc1ca --- /dev/null +++ b/src/soc/amd/stoneyridge/aoac.c @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include + +/* + * Table of devices that need their AOAC registers enabled and waited + * upon (usually about .55 milliseconds). Instead of individual delays + * waiting for each device to become available, a single delay will be + * executed. + */ +static const unsigned int aoac_devs[] = { + FCH_AOAC_DEV_UART0 + CONFIG_UART_FOR_CONSOLE * 2, + FCH_AOAC_DEV_AMBA, + FCH_AOAC_DEV_I2C0, + FCH_AOAC_DEV_I2C1, + FCH_AOAC_DEV_I2C2, + FCH_AOAC_DEV_I2C3, +}; + +void enable_aoac_devices(void) +{ + bool status; + int i; + + for (i = 0; i < ARRAY_SIZE(aoac_devs); i++) + power_on_aoac_device(aoac_devs[i]); + + /* Wait for AOAC devices to indicate power and clock OK */ + do { + udelay(100); + status = true; + for (i = 0; i < ARRAY_SIZE(aoac_devs); i++) + status &= is_aoac_device_enabled(aoac_devs[i]); + } while (!status); +} diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 2ffbc92e0124..a5cbb10a6363 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include @@ -32,21 +31,6 @@ #include #include -/* - * Table of devices that need their AOAC registers enabled and waited - * upon (usually about .55 milliseconds). Instead of individual delays - * waiting for each device to become available, a single delay will be - * executed. - */ -static const unsigned int aoac_devs[] = { - FCH_AOAC_DEV_UART0 + CONFIG_UART_FOR_CONSOLE * 2, - FCH_AOAC_DEV_AMBA, - FCH_AOAC_DEV_I2C0, - FCH_AOAC_DEV_I2C1, - FCH_AOAC_DEV_I2C2, - FCH_AOAC_DEV_I2C3, -}; - static int is_sata_config(void) { return !((SataNativeIde == CONFIG_STONEYRIDGE_SATA_MODE) @@ -152,23 +136,6 @@ const struct irq_idx_name *sb_get_apic_reg_association(size_t *size) return irq_association; } -void enable_aoac_devices(void) -{ - bool status; - int i; - - for (i = 0; i < ARRAY_SIZE(aoac_devs); i++) - power_on_aoac_device(aoac_devs[i]); - - /* Wait for AOAC devices to indicate power and clock OK */ - do { - udelay(100); - status = true; - for (i = 0; i < ARRAY_SIZE(aoac_devs); i++) - status &= is_aoac_device_enabled(aoac_devs[i]); - } while (!status); -} - static void sb_enable_lpc(void) { u8 byte; -- cgit v1.2.3