From d077b58c61896c71218a90292bbcd5063c11698f Mon Sep 17 00:00:00 2001 From: Ravi Sarawadi Date: Wed, 9 Sep 2015 14:12:16 -0700 Subject: soc/braswell: Fix issues found during static code analysis TEST=Build, boot to OS Original-Reviewed-on: https://chromium-review.googlesource.com/299483 Original-Reviewed-by: Aaron Durbin Change-Id: I738003b8dfff6a5255085d39e378e18d6ad36bcf Signed-off-by: Ravi Sarawadi Reviewed-on: https://review.coreboot.org/12738 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/intel/braswell/chip.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'src/soc/intel/braswell/chip.c') diff --git a/src/soc/intel/braswell/chip.c b/src/soc/intel/braswell/chip.c index f177a30eb030..57590c2ba9b2 100644 --- a/src/soc/intel/braswell/chip.c +++ b/src/soc/intel/braswell/chip.c @@ -84,7 +84,16 @@ static void enable_dev(device_t dev) void soc_silicon_init_params(SILICON_INIT_UPD *params) { device_t dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); - struct soc_intel_braswell_config *config = dev->chip_info; + struct soc_intel_braswell_config *config; + + if (!dev) { + printk(BIOS_ERR, + "Error! Device (%s) not found, " + "soc_silicon_init_params!\n", dev_path(dev)); + return; + } + + config = dev->chip_info; /* Set the parameters for SiliconInit */ printk(BIOS_DEBUG, "Updating UPD values for SiliconInit\n"); -- cgit v1.2.3