From 5a283ef65cde46229ec2e2e46d68773df34610e2 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 7 Nov 2017 18:06:36 +0530 Subject: soc/intel/cannonlake: Make use of Intel SPI common block TEST=Build and boot RVP Change-Id: I5ff9867f08e43016a797b1b3719053df0c382174 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/22362 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Aaron Durbin --- src/soc/intel/cannonlake/Makefile.inc | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/soc/intel/cannonlake/Makefile.inc') diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index de137f629a26..076e76b95288 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -54,13 +54,11 @@ ramstage-y += sd.c smm-y += gpio.c smm-y += pmutil.c smm-y += smihandler.c -smm-$(CONFIG_SPI_FLASH_SMM) += spi.c smm-$(CONFIG_UART_DEBUG) += uart.c smm-$(CONFIG_UART_DEBUG) += uart_pch.c postcar-y += memmap.c postcar-y += pmutil.c -postcar-y += spi.c postcar-$(CONFIG_UART_DEBUG) += uart.c verstage-y += gspi.c -- cgit v1.2.3