From 40c2c07b6f93ef63ef6f5a1588253bb5a91e0016 Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Fri, 30 Apr 2021 15:42:31 +0200
Subject: soc/{amd/stoneyridge,intel}: Don't select VBOOT_SEPARATE_VERSTAGE
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Now the bootblock is not limited to 64K so integrating vboot into the
bootblock reduces the binary size. intel/apl is an exception since the
bootblock size is limited to 32K.

Change-Id: I5e02961183b5bcc37365458a3b10342e5bc2b525
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52788
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
---
 src/soc/intel/icelake/Kconfig | 1 -
 1 file changed, 1 deletion(-)

(limited to 'src/soc/intel/icelake')

diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index d8845513b63f..74f1eeefa871 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -171,7 +171,6 @@ config SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL
 	default 0xc35
 
 config VBOOT
-	select VBOOT_SEPARATE_VERSTAGE
 	select VBOOT_MUST_REQUEST_DISPLAY
 	select VBOOT_STARTS_IN_BOOTBLOCK
 	select VBOOT_VBNV_CMOS
-- 
cgit v1.2.3