From 978fa765ca93d02eb9f1f1aacb65a1783fa86fb0 Mon Sep 17 00:00:00 2001 From: kewei xu Date: Mon, 1 Mar 2021 11:04:20 +0800 Subject: soc/mediatek/mt8195: Add i2c driver support TEST=write/read EEPROM on MT8195 EVB successfully Change-Id: Ia26e55512501e9758d7f5543d176730cf30ce03d Signed-off-by: kewei xu Reviewed-on: https://review.coreboot.org/c/coreboot/+/53894 Reviewed-by: Yu-Ping Wu Tested-by: build bot (Jenkins) --- src/soc/mediatek/mt8195/include/soc/i2c.h | 58 +++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 src/soc/mediatek/mt8195/include/soc/i2c.h (limited to 'src/soc/mediatek/mt8195/include/soc') diff --git a/src/soc/mediatek/mt8195/include/soc/i2c.h b/src/soc/mediatek/mt8195/include/soc/i2c.h new file mode 100644 index 000000000000..977106e482a2 --- /dev/null +++ b/src/soc/mediatek/mt8195/include/soc/i2c.h @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_MEDIATEK_MT8195_I2C_H +#define SOC_MEDIATEK_MT8195_I2C_H + +#include + +/* I2C Register */ +struct mt_i2c_regs { + uint32_t data_port; + uint32_t slave_addr; + uint32_t intr_mask; + uint32_t intr_stat; + uint32_t control; + uint32_t transfer_len; + uint32_t transac_len; + uint32_t delay_len; + uint32_t timing; + uint32_t start; + uint32_t ext_conf; + uint32_t ltiming; + uint32_t hs; + uint32_t io_config; + uint32_t fifo_addr_clr; + uint32_t reserved0[2]; + uint32_t transfer_aux_len; + uint32_t clock_div; + uint32_t time_out; + uint32_t softreset; + uint32_t reserved1[36]; + uint32_t debug_stat; + uint32_t debug_ctrl; + uint32_t reserved2[2]; + uint32_t fifo_stat; + uint32_t fifo_thresh; + uint32_t reserved3[932]; + uint32_t multi_dma; + uint32_t reserved4[2]; + uint32_t rollback; +}; + +/* I2C ID Number*/ +enum { + I2C0, + I2C1, + I2C2, + I2C3, + I2C4, + I2C5, + I2C6, + I2C7, +}; + +check_member(mt_i2c_regs, multi_dma, 0xf8c); + +void mtk_i2c_bus_init(uint8_t bus); + +#endif /* SOC_MEDIATEK_MT8195_I2C_H */ -- cgit v1.2.3