From 1c920108499a7394bd072a7be380e491eac6fa28 Mon Sep 17 00:00:00 2001
From: Rex-BC Chen <rex-bc.chen@mediatek.com>
Date: Tue, 4 May 2021 10:32:54 +0800
Subject: soc/mediatek/mt8195: Add NOR-Flash support

TEST=boot to romstage on MT8195 EVB

Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: I450281fb4b1750e59cb76f6b2083f0e2889fd4cc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52875
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
---
 src/soc/mediatek/mt8195/spi.c | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src/soc/mediatek/mt8195/spi.c')

diff --git a/src/soc/mediatek/mt8195/spi.c b/src/soc/mediatek/mt8195/spi.c
index bc02aa0e60e6..cfa52c436fab 100644
--- a/src/soc/mediatek/mt8195/spi.c
+++ b/src/soc/mediatek/mt8195/spi.c
@@ -3,6 +3,7 @@
 #include <assert.h>
 #include <device/mmio.h>
 #include <soc/addressmap.h>
+#include <soc/flash_controller_common.h>
 #include <soc/gpio.h>
 #include <soc/spi.h>
 
@@ -93,6 +94,7 @@ void mtk_spi_set_gpio_pinmux(unsigned int bus, enum spi_pad_mask pad_select)
 
 static const struct spi_ctrlr spi_flash_ctrlr = {
 	.max_xfer_size = 65535,
+	.flash_probe = mtk_spi_flash_probe,
 };
 
 const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
@@ -103,6 +105,8 @@ const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
 	},
 	{
 		.ctrlr = &spi_flash_ctrlr,
+		.bus_start = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
+		.bus_end = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
 	},
 };
 
-- 
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