From 320647abdad1ea6cdceb834933507677020ea388 Mon Sep 17 00:00:00 2001 From: Daisuke Nojiri Date: Thu, 19 Jun 2014 19:09:47 -0700 Subject: vboot2: add verstage Verstage will host vboot2 for firmware verification. It's a stage in the sense that it has its own set of toolchains, compiler flags, and includes. This allows us to easily add object files as needed. But it's directly linked to bootblock. This allows us to avoid code duplication for stage loading and jumping (e.g. cbfs driver) for the boards where bootblock has to run in a different architecture (e.g. Tegra124). To avoid name space conflict, verstage symbols are prefixed with verstage_. TEST=Built with VBOOT2_VERIFY_FIRMWARE on/off. Booted Nyan Blaze. BUG=None BRANCH=none Original-Signed-off-by: Daisuke Nojiri Original-Change-Id: Iad57741157ec70426c676e46c5855e6797ac1dac Original-Reviewed-on: https://chromium-review.googlesource.com/204376 Original-Reviewed-by: Randall Spangler (cherry picked from commit 27940f891678dae975b68f2fc729ad7348192af3) Signed-off-by: Marc Jones Change-Id: I42b2b3854a24ef6cda2316eb741ca379f41516e0 Reviewed-on: http://review.coreboot.org/8159 Reviewed-by: Stefan Reinauer Tested-by: build bot (Jenkins) --- toolchain.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'toolchain.inc') diff --git a/toolchain.inc b/toolchain.inc index b54d95935bec..bd8da8336602 100644 --- a/toolchain.inc +++ b/toolchain.inc @@ -51,7 +51,7 @@ HOSTCXX:=CCC_CXX="$(HOSTCXX)" $(CXX) ROMCC=CCC_CC="$(ROMCC_BIN)" $(CC) endif -COREBOOT_STANDARD_STAGES := bootblock romstage ramstage +COREBOOT_STANDARD_STAGES := bootblock verstage romstage ramstage ARCHDIR-i386 := x86 ARCHDIR-x86_32 := x86 -- cgit v1.2.3