From a241d6c76bf43b16a3022ae036e5b84822269ec7 Mon Sep 17 00:00:00 2001 From: Jean Lucas Date: Sat, 9 Dec 2017 04:34:57 -0500 Subject: autoport: Add Intel PCIe Root Port and Bridges - 0x0151: Xeon E3-1200 PCIe Root Port - 0x1e25: 7/C216 Series Chipset Family DMI to PCI Bridge - 0x2448: 82801 Mobile PCI Bridge - 0x244e: 82801 Desktop PCI Bridge Change-Id: I4111b73adc0f08d643c940cd43ab7fd4c0af7668 Signed-off-by: Jean Lucas Reviewed-on: https://review.coreboot.org/22794 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- util/autoport/bd82x6x.go | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'util/autoport/bd82x6x.go') diff --git a/util/autoport/bd82x6x.go b/util/autoport/bd82x6x.go index ce06a8167b61..dc5d6897f462 100644 --- a/util/autoport/bd82x6x.go +++ b/util/autoport/bd82x6x.go @@ -439,10 +439,11 @@ func init() { /* PCIe bridge */ for _, id := range []uint16{ - 0x1c10, 0x1c12, 0x1c14, 0x1c16, - 0x1c18, 0x1c1a, 0x1c1c, 0x1c1e, - 0x1e10, 0x1e12, 0x1e14, 0x1e16, - 0x1e18, 0x1e1a, 0x1e1c, 0x1e1e, + 0x0151, 0x1c10, 0x1c12, 0x1c14, + 0x1c16, 0x1c18, 0x1c1a, 0x1c1c, + 0x1c1e, 0x1e10, 0x1e12, 0x1e14, + 0x1e16, 0x1e18, 0x1e1a, 0x1e1c, + 0x1e1e, 0x1e25, 0x244e, 0x2448, } { RegisterPCI(0x8086, id, GenericPCI{}) } -- cgit v1.2.3