From 4089ddb13c509c3fb4a77692c7cab5cd58f42baf Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Wed, 24 Feb 2021 09:16:52 -0700 Subject: util/spd_tools/lp4x: Add 2 new parts to global memory definition This adds the definitions for MT53E1G32D4NQ-046 WT:E used on Majolica, and the NT6AP256T32AV-J1 part used on Guybrush. BUG=b:178715165 TEST=Generate SPDs Signed-off-by: Martin Roth Change-Id: I7cd729fc72d8f44a449429e97683b2ca1f560f2c Reviewed-on: https://review.coreboot.org/c/coreboot/+/51057 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: EricR Lai --- util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt | 26 ++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'util/spd_tools') diff --git a/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt b/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt index ffb08c728d2b..fcbe624d9b02 100644 --- a/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt +++ b/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt @@ -229,6 +229,32 @@ "ranksPerChannel": 1, "speedMbps": 4267 } + }, + { + "name": "NT6AP256T32AV-J1", + "attribs": { + "densityPerChannelGb": 4, + "banks": 8, + "channelsPerDie": 2, + "diesPerPackage": 1, + "bitWidthPerChannel": 16, + "ranksPerChannel": 1, + "speedMbps": 4267, + "tckMaxPs": 1250, + "casLatencies": "14 20 24 28 32 36" + } + }, + { + "name": "MT53E1G32D4NQ-046 WT:E", + "attribs": { + "densityPerChannelGb": 8, + "banks": 8, + "channelsPerDie": 2, + "diesPerPackage": 2, + "bitWidthPerChannel": 16, + "ranksPerChannel": 2, + "speedMbps": 4267 + } } ] } -- cgit v1.2.3