#
#
# SPDX-License-Identifier: GPL-2.0-only

config CPU_AMD_PI
	bool
	default y if CPU_AMD_PI_00630F01
	default y if CPU_AMD_PI_00730F01
	default y if CPU_AMD_PI_00660F01
	default n
	select ARCH_BOOTBLOCK_X86_32
	select ARCH_VERSTAGE_X86_32
	select ARCH_ROMSTAGE_X86_32
	select ARCH_RAMSTAGE_X86_32
	select DRIVERS_AMD_PI
	select TSC_SYNC_LFENCE
	select UDELAY_LAPIC
	select LAPIC_MONOTONIC_TIMER
	select SPI_FLASH if HAVE_ACPI_RESUME
	select SMM_ASEG
	select NO_FIXED_XIP_ROM_SIZE
	select SSE2

if CPU_AMD_PI

config UDELAY_LAPIC_FIXED_FSB
	int
	default 200

# TODO: Sync these with definitions in PI vendorcode.
# DCACHE_RAM_BASE must equal BSP_STACK_BASE_ADDR.
# DCACHE_RAM_SIZE must equal BSP_STACK_SIZE.

config DCACHE_RAM_BASE
	hex
	default 0x30000

config DCACHE_RAM_SIZE
	hex
	default 0x10000

config DCACHE_BSP_STACK_SIZE
	hex
	default 0x4000

config C_ENV_BOOTBLOCK_SIZE
	hex
	default 0x8000

endif # CPU_AMD_PI

source "src/cpu/amd/pi/00630F01/Kconfig"
source "src/cpu/amd/pi/00730F01/Kconfig"
source "src/cpu/amd/pi/00660F01/Kconfig"