# # This file is part of the coreboot project. # # Copyright (C) 2011 Advanced Micro Devices, Inc. # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; version 2 of the License. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # chip northbridge/amd/agesa/family12/root_complex device cpu_cluster 0 on chip cpu/amd/agesa/family12 device lapic 0 on end end end device domain 0 on subsystemid 0x1022 0x1705 inherit chip northbridge/amd/agesa/family12 # CPU side of HT root complex chip northbridge/amd/agesa/family12 # PCI side of HT root complex device pci 0.0 on end # Root Complex device pci 1.0 on end # Internal Graphics Bridge device pci 1.1 on end # Audio Controller device pci 2.0 on end # Root Port device pci 3.0 on end # Root Port device pci 4.0 on end # PCIE P2P bridge device pci 5.0 on end # PCIE P2P bridge device pci 6.0 on end # PCIE P2P bridge device pci 7.0 on end # PCIE P2P bridge device pci 8.0 on end # NB/SB Link P2P bridge end # agesa northbridge chip southbridge/amd/cimx/sb900 # it is under NB/SB Link, but on the same pri bus device pci 10.0 on end # USB XHCI device pci 10.1 on end # USB XHCI device pci 11.0 on end # SATA device pci 12.0 on end # USB device pci 12.2 on end # USB device pci 13.0 on end # USB device pci 13.2 on end # USB device pci 14.0 on # SM chip drivers/generic/generic #dimm 0-0-0 device i2c 50 on end end chip drivers/generic/generic #dimm 0-0-1 device i2c 51 on end end end # SM device pci 14.1 on end # IDE device pci 14.2 on end # HDA device pci 14.3 on # LPC chip superio/smsc/kbc1100 device pnp 2e.7 on # Keyboard io 0x60 = 0x60 io 0x62 = 0x64 irq 0x70 = 1 irq 0x72 = 12 end end # kbc1100 end #LPC device pci 14.4 on end # PCI bridge device pci 14.5 on end # USB 2 device pci 14.6 on end # Ethernet Controller device pci 14.7 on end # SD Flash Controller device pci 15.0 on end # PCIe PortA device pci 15.1 on end # PCIe PortB device pci 15.2 on end # PCIe PortC device pci 15.3 on end # PCIe PortD register "gpp_configuration" = "4" #1:1:1:1 register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE end #southbridge/amd/cimx/sb900 device pci 18.0 on end device pci 18.1 on end device pci 18.2 on end device pci 18.3 on end device pci 18.4 on end device pci 18.5 on end device pci 18.6 on end device pci 18.7 on end end #chip northbridge/amd/agesa/family12 # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family12/root_complex