/* * This file is part of the coreboot project. * * Copyright (C) 2011 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #include "AGESA.h" #include "amdlib.h" #include #include "SB800.h" #include static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr); const BIOS_CALLOUT_STRUCT BiosCallouts[] = { {AGESA_DO_RESET, agesa_Reset }, {AGESA_READ_SPD, agesa_ReadSpd_from_cbfs }, {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported }, {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp }, {AGESA_GNB_PCIE_SLOT_RESET, agesa_NoopSuccess }, {AGESA_HOOKBEFORE_DRAM_INIT, board_BeforeDramInit }, {AGESA_HOOKBEFORE_DRAM_INIT_RECOVERY, agesa_NoopSuccess }, {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess }, {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess }, }; const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); /* Call the host environment interface to provide a user hook opportunity. */ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr) { // Unlike AMD/Inagua, this board is unable to vary the RAM voltage. // Make sure the right speed settings are selected. ((MEM_DATA_STRUCT*)ConfigPtr)->ParameterListPtr->DDR3Voltage = VOLT1_5; return AGESA_SUCCESS; }