chip soc/intel/apollolake # EMMC Tx CMD Delay # Refer to EDS-Vol2-16.32. # [14:8] steps of delay for DDR mode, each 125ps. # [6:0] steps of delay for SDR mode, each 125ps. register "emmc_tx_cmd_cntl" = "0x00000505" # EMMC TX DATA Delay 1 # Refer to EDS-Vol2-16.33. # [14:8] steps of delay for HS400, each 125ps. # [6:0] steps of delay for SDR104/HS200, each 125ps. register "emmc_tx_data_cntl1" = "0x00000c0d" # EMMC TX DATA Delay 2 # Refer to EDS-Vol2-16.34. # [30:24] steps of delay for SDR50, each 125ps. # [22:16] steps of delay for DDR50, each 125ps. # [14:8] steps of delay for SDR25/HS50, each 125ps. # [6:0] steps of delay for SDR12, each 125ps. register "emmc_tx_data_cntl2" = "0x1c2a2a2a" # EMMC RX CMD/DATA Delay 1 # Refer to EDS-Vol2-16.35. # [30:24] steps of delay for SDR50, each 125ps. # [22:16] steps of delay for DDR50, each 125ps. # [14:8] steps of delay for SDR25/HS50, each 125ps. # [6:0] steps of delay for SDR12, each 125ps. register "emmc_rx_cmd_data_cntl1" = "0x00181b1b" # EMMC RX CMD/DATA Delay 2 # Refer to EDS-Vol2-16.37. # [17:16] stands for Rx Clock before Output Buffer # [14:8] steps of delay for Auto Tuning Mode, each 125ps. # [6:0] steps of delay for HS200, each 125ps. register "emmc_rx_cmd_data_cntl2" = "0x0001000f" # EMMC Rx Strobe Delay # Refer to EDS-Vol2-16.36. # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps. # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps. register "emmc_rx_strobe_cntl" = "0x00000a0a" # Override USB2 PER PORT register (PORT 4) register "usb2eye[4]" = "{ .Usb20OverrideEn = 1, .Usb20PerPortPeTxiSet = 7, .Usb20PerPortTxiSet = 3, .Usb20IUsbTxEmphasisEn = 3, .Usb20PerPortTxPeHalf = 0, }" # Override USB2 PER PORT register (PORT 6) register "usb2eye[6]" = "{ .Usb20OverrideEn = 1, .Usb20PerPortPeTxiSet = 3, .Usb20PerPortTxiSet = 0, .Usb20IUsbTxEmphasisEn = 3, .Usb20PerPortTxPeHalf = 0, }" # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | #+-------------------+---------------------------+ #| GSPI0 | cr50 TPM. Early init is | #| | required to set up a BAR | #| | for TPM communication | #| | before memory is up | #| I2C5 | Audio | #| I2C6 | Trackpad | #+-------------------+---------------------------+ register "common_soc_config" = "{ .gspi[0] = { .speed_mhz = 1, .early_init = 1, }, .i2c[6] = { .speed = I2C_SPEED_FAST, .rise_time_ns = 66, .fall_time_ns = 90, .data_hold_time_ns = 350, }, }" device domain 0 on device pci 15.0 on chip drivers/usb/acpi register "desc" = ""Root Hub"" register "type" = "UPC_TYPE_HUB" device usb 0.0 on chip drivers/usb/acpi register "desc" = ""Right Type-A Port"" register "type" = "UPC_TYPE_A" register "group" = "ACPI_PLD_GROUP(2, 2)" device usb 2.1 on end end chip drivers/usb/acpi device usb 2.3 off end end chip drivers/usb/acpi register "desc" = ""Right Type-A Port"" register "type" = "UPC_TYPE_USB3_A" register "group" = "ACPI_PLD_GROUP(2, 2)" device usb 3.1 on end end chip drivers/usb/acpi device usb 3.3 off end end end end end # - XHCI device pci 17.1 on chip drivers/i2c/da7219 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_137_IRQ)" register "btn_cfg" = "50" register "mic_det_thr" = "500" register "jack_ins_deb" = "20" register "jack_det_rate" = ""32ms_64ms"" register "jack_rem_deb" = "1" register "a_d_btn_thr" = "0xa" register "d_b_btn_thr" = "0x16" register "b_c_btn_thr" = "0x21" register "c_mic_btn_thr" = "0x3e" register "btn_avg" = "4" register "adc_1bit_rpt" = "1" register "micbias_lvl" = "2600" register "mic_amp_in_sel" = ""diff"" device i2c 1a on end end end # - I2C 5 device pci 17.2 on chip drivers/i2c/generic register "hid" = ""ELAN0000"" register "desc" = ""ELAN Touchpad"" register "irq" = "ACPI_IRQ_WAKE_EDGE_LOW(GPIO_135_IRQ)" register "wake" = "GPE0_DW3_27" register "probed" = "1" device i2c 15 on end end end # - I2C 6 end end