# SPDX-License-Identifier: GPL-2.0-or-later

chip northbridge/intel/sandybridge
	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
	register "gfx.ndid" = "3"
	register "gfx.use_spread_spectrum_clock" = "1"
	register "gpu_cpu_backlight" = "0x00000129"
	register "gpu_dp_b_hotplug" = "4"
	register "gpu_dp_c_hotplug" = "4"
	register "gpu_dp_d_hotplug" = "4"
	register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
	register "gpu_panel_power_backlight_off_delay" = "2000"
	register "gpu_panel_power_backlight_on_delay" = "2000"
	register "gpu_panel_power_cycle_delay" = "5"
	register "gpu_panel_power_down_delay" = "230"
	register "gpu_panel_power_up_delay" = "300"
	register "gpu_pch_backlight" = "0x02880288"
	register "spd_addresses" = "{0x50, 0, 0x52, 0}"

	device domain 0 on

		device ref host_bridge on  end

		chip southbridge/intel/bd82x6x # Intel Cougar or Panther Point PCH
			register "pcie_port_coalesce" = "true"
			register "sata_interface_speed_support" = "0x3"
			register "spi_uvscc" = "0x2005"
			register "spi_lvscc" = "0"

			device ref mei1 on  end
			device ref mei2 off end
			device ref me_ide_r off end
			device ref me_kt off end
			device ref gbe on  end
			device ref ehci2 on  end
			device ref hda on  end
			device ref ehci1 on  end
			device ref pci_bridge off end
			device ref lpc on
				chip drivers/pc80/tpm
					device pnp 0c31.0 on end
				end
			end
			device ref sata1 on  end
			device ref smbus on  end
			device ref sata2 off end
			device ref thermal off end
		end
	end
end