##
## This file is part of the coreboot project.
##
##
## SPDX-License-Identifier: GPL-2.0-only

if BOARD_INTEL_HARCUVAR

config BOARD_SPECIFIC_OPTIONS
	def_bool y
	select SOC_INTEL_DENVERTON_NS
	select BOARD_ROMSIZE_KB_16384
	select HAVE_ACPI_TABLES

config MAINBOARD_DIR
	string
	default "intel/harcuvar"

config MAINBOARD_PART_NUMBER
	string
	default "Harcuvar CRB"

config ENABLE_FSP_MEMORY_DOWN
	bool "Enable Memory Down"
	default n
	help
	  Select this option to enable Memory Down function.

config SPD_LOC
	depends on ENABLE_FSP_MEMORY_DOWN
	hex "SPD binary location in cbfs"
	default 0xfffdf000
	help
	  Location of SPD binary for memory down function.

endif # BOARD_INTEL_HARCUVAR