chip northbridge/intel/sandybridge
	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
	register "gfx.link_frequency_270_mhz" = "1"
	register "gfx.ndid" = "3"
	register "gfx.use_spread_spectrum_clock" = "1"
	register "gpu_cpu_backlight" = "0x00000060"
	register "gpu_dp_b_hotplug" = "4"
	register "gpu_dp_c_hotplug" = "4"
	register "gpu_dp_d_hotplug" = "4"
	register "gpu_panel_port_select" = "0"
	register "gpu_panel_power_backlight_off_delay" = "2000"
	register "gpu_panel_power_backlight_on_delay" = "2000"
	register "gpu_panel_power_cycle_delay" = "5"
	register "gpu_panel_power_down_delay" = "500"
	register "gpu_panel_power_up_delay" = "600"
	register "gpu_pch_backlight" = "0x041e041e"
	device cpu_cluster 0x0 on
		chip cpu/intel/model_206ax
			register "c1_acpower" = "1"
			register "c1_battery" = "1"
			register "c2_acpower" = "3"
			register "c2_battery" = "3"
			register "c3_acpower" = "5"
			register "c3_battery" = "5"
			device lapic 0x0 on end
			device lapic 0xacac off end
		end
	end
	device domain 0x0 on
		device pci 00.0 on # Host bridge Host bridge
			subsystemid 0x17aa 0x2205
		end
		device pci 01.0 off # PCIe Bridge for discrete graphics
		end
		device pci 02.0 on # Internal graphics VGA controller
			subsystemid 0x17aa 0x2205
		end
		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
			register "c2_latency" = "0x0065"
			register "docking_supported" = "1"
			register "gen1_dec" = "0x00000000"
			register "gen2_dec" = "0x000c0701"
			register "gen3_dec" = "0x000c0069"
			register "gen4_dec" = "0x000c06a1"
			register "gpi13_routing" = "2"
			register "gpi7_routing" = "2"
			register "pcie_hotplug_map" = "{ 0, 1, 0, 1, 0, 0, 0, 0 }"
			register "pcie_port_coalesce" = "1"
			register "sata_interface_speed_support" = "0x3"
			register "sata_port_map" = "0x5"
			register "superspeed_capable_ports" = "0x0000000f"
			register "xhci_overcurrent_mapping" = "0x00000c03"
			register "xhci_switchable_ports" = "0x0000000f"

			register "spi_uvscc" = "0x2005"
			register "spi_lvscc" = "0x2005"

			device pci 14.0 on # USB 3.0 Controller
				subsystemid 0x17aa 0x2205
			end
			device pci 16.0 off # Management Engine Interface 1
			end
			device pci 16.1 off # Management Engine Interface 2
			end
			device pci 16.2 off # Management Engine IDE-R
			end
			device pci 16.3 off # Management Engine KT
			end
			device pci 19.0 off # Intel Gigabit Ethernet
			end
			device pci 1a.0 on # USB2 EHCI #2
				subsystemid 0x17aa 0x2205
			end
			device pci 1b.0 on # High Definition Audio Audio controller
				subsystemid 0x17aa 0x2205
			end
			device pci 1c.0 on # PCIe Port #1
				subsystemid 0x17aa 0x2205
			end
			device pci 1c.1 on # PCIe Port #2
				subsystemid 0x17aa 0x2205
			end
			device pci 1c.2 off # PCIe Port #3
			end
			device pci 1c.3 on # PCIe Port #4
				subsystemid 0x17aa 0x2205
			end
			device pci 1c.4 off # PCIe Port #5
			end
			device pci 1c.5 off # PCIe Port #6
			end
			device pci 1c.6 off # PCIe Port #7
			end
			device pci 1c.7 off # PCIe Port #8
			end
			device pci 1d.0 on # USB2 EHCI #1
				subsystemid 0x17aa 0x2205
			end
			device pci 1e.0 off # PCI bridge
			end
			device pci 1f.0 on # LPC bridge PCI-LPC bridge
				subsystemid 0x17aa 0x2205
				chip drivers/pc80/tpm
					device pnp 0c31.0 on end
				end
			end
			device pci 1f.2 on # SATA Controller 1
				subsystemid 0x17aa 0x2205
			end
			device pci 1f.3 on # SMBus
				subsystemid 0x17aa 0x2205
				chip drivers/i2c/at24rf08c # eeprom, 8 virtual devices, same chip
					device i2c 54 on
					end
					device i2c 55 on
					end
					device i2c 56 on
					end
					device i2c 57 on
					end
					device i2c 5c on
					end
					device i2c 5d on
					end
					device i2c 5e on
					end
					device i2c 5f on
					end
				end
			end
			device pci 1f.5 off # SATA Controller 2
			end
			device pci 1f.6 off # Thermal
			end
		end
	end
end