/* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ #include #include #include #include #include #include #include "gpio_ftns.h" static void early_lpc_init(void); void board_BeforeAgesa(struct sysinfo *cb) { u32 val; early_lpc_init(); /* Disable SVI2 controller to wait for command completion */ val = pci_read_config32(PCI_DEV(0, 0x18, 5), 0x12C); if (!(val & (1 << 30))) { val |= (1 << 30); pci_write_config32(PCI_DEV(0, 0x18, 5), 0x12C, val); } /* Release GPIO32/33 for other uses. */ pm_write8(0xea, 1); } static void early_lpc_init(void) { u32 setting = 0x0; // // Configure output disabled, value low, pull up/down disabled // if (CONFIG(BOARD_PCENGINES_APU5)) { configure_gpio(IOMUX_GPIO_22, Function0, GPIO_22, setting); } if (CONFIG(BOARD_PCENGINES_APU2) || CONFIG(BOARD_PCENGINES_APU3) || CONFIG(BOARD_PCENGINES_APU4)) { configure_gpio(IOMUX_GPIO_32, Function0, GPIO_32, setting); } configure_gpio(IOMUX_GPIO_49, Function2, GPIO_49, setting); configure_gpio(IOMUX_GPIO_50, Function2, GPIO_50, setting); configure_gpio(IOMUX_GPIO_71, Function0, GPIO_71, setting); // // Configure output enabled, value low, pull up/down disabled // setting = GPIO_OUTPUT_ENABLE; if (CONFIG(BOARD_PCENGINES_APU3) || CONFIG(BOARD_PCENGINES_APU4)) { configure_gpio(IOMUX_GPIO_33, Function0, GPIO_33, setting); } configure_gpio(IOMUX_GPIO_57, Function1, GPIO_57, setting); configure_gpio(IOMUX_GPIO_58, Function1, GPIO_58, setting); configure_gpio(IOMUX_GPIO_59, Function3, GPIO_59, setting); // // Configure output enabled, value high, pull up/down disabled // setting = GPIO_OUTPUT_ENABLE | GPIO_OUTPUT_VALUE; if (CONFIG(BOARD_PCENGINES_APU5)) { configure_gpio(IOMUX_GPIO_32, Function0, GPIO_32, setting); configure_gpio(IOMUX_GPIO_33, Function0, GPIO_33, setting); } configure_gpio(IOMUX_GPIO_51, Function2, GPIO_51, setting); configure_gpio(IOMUX_GPIO_55, Function3, GPIO_55, setting); configure_gpio(IOMUX_GPIO_64, Function2, GPIO_64, setting); configure_gpio(IOMUX_GPIO_68, Function0, GPIO_68, setting); }