/* SPDX-License-Identifier: GPL-2.0-or-later */ #include #include #include #include #include #include #include #include #include #include #include #include uintptr_t fsp_soc_get_igd_bar(void) { return graphics_get_memory_base(); } void graphics_soc_init(struct device *dev) { uint32_t ddi_buf_ctl; /* * Enable DDI-A (eDP) 4-lane operation if the link is not up yet. * This will allow the kernel to use 4-lane eDP links properly * if the VBIOS or GOP driver do not execute. */ ddi_buf_ctl = graphics_gtt_read(DDI_BUF_CTL_A); if (!acpi_is_wakeup_s3() && !(ddi_buf_ctl & DDI_BUF_CTL_ENABLE)) { ddi_buf_ctl |= (DDI_A_4_LANES | DDI_INIT_DISPLAY_DETECTED | DDI_BUF_IS_IDLE); graphics_gtt_write(DDI_BUF_CTL_A, ddi_buf_ctl); } /* IGD needs to Bus Master */ pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO); /* * GFX PEIM module inside FSP binary is taking care of graphics * initialization based on RUN_FSP_GOP Kconfig option and input * VBT file. * * In case of non-FSP solution, SoC need to select another * Kconfig to perform GFX initialization. */ if (CONFIG(RUN_FSP_GOP)) { /* nothing to do */ } else if (CONFIG(MAINBOARD_USE_LIBGFXINIT)) { if (!acpi_is_wakeup_s3() && display_init_required()) { int lightup_ok; gma_gfxinit(&lightup_ok); gfx_set_init_done(lightup_ok); } } else { /* Initialize PCI device, load/execute BIOS Option ROM */ pci_dev_init(dev); } } uintptr_t graphics_soc_write_acpi_opregion(const struct device *device, uintptr_t current, struct acpi_rsdp *rsdp) { igd_opregion_t *opregion; printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n"); opregion = (igd_opregion_t *)current; if (intel_gma_init_igd_opregion(opregion) != CB_SUCCESS) return current; current += sizeof(igd_opregion_t); return acpi_align_current(current); }