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#ifndef ARCH_X86_MTRR_H
#define ARCH_X86_MTRR_H
/* These are the region types */
#define MTRR_TYPE_UNCACHEABLE 0
#define MTRR_TYPE_WRCOMB 1
/*#define MTRR_TYPE_ 2*/
/*#define MTRR_TYPE_ 3*/
#define MTRR_TYPE_WRTHROUGH 4
#define MTRR_TYPE_WRPROT 5
#define MTRR_TYPE_WRBACK 6
#define MTRR_NUM_TYPES 7
#define MTRRcap_MSR 0x0fe
#define MTRRdefType_MSR 0x2ff
#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
#define NUM_FIXED_RANGES 88
#define MTRRfix64K_00000_MSR 0x250
#define MTRRfix16K_80000_MSR 0x258
#define MTRRfix16K_A0000_MSR 0x259
#define MTRRfix4K_C0000_MSR 0x268
#define MTRRfix4K_C8000_MSR 0x269
#define MTRRfix4K_D0000_MSR 0x26a
#define MTRRfix4K_D8000_MSR 0x26b
#define MTRRfix4K_E0000_MSR 0x26c
#define MTRRfix4K_E8000_MSR 0x26d
#define MTRRfix4K_F0000_MSR 0x26e
#define MTRRfix4K_F8000_MSR 0x26f
#if !defined (ASSEMBLY)
void x86_setup_var_mtrrs(unsigned address_bits);
void x86_setup_mtrrs(unsigned address_bits);
int x86_mtrr_check(void);
void stage1_set_var_mtrr(unsigned long reg, unsigned long base,
unsigned long size, unsigned long type);
void stage1_set_fix_mtrr(u32 reg, u8 type);
void stage1_set_var_mtrr_x(unsigned long reg, u32 base_lo, u32 base_hi,
u32 size_lo, u32 size_hi, unsigned long type);
#endif
#endif /* ARCH_X86_MTRR_H */
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