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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007 Ronald G. Minnich <rminnich@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/* Leave this in until we know how to do it in dts. */
/*
chip southbridge/amd/cs5536_lx
#register "flash_irq" = "14"
register "audio_irq" = "5"
register "usb_irq" = "7"
register "uart0_irq" = "0"
register "uart1_irq" = "4"
## PCI INTA ... INTD and their GPIO pins
## int==0: disable
register "pci_int[0]" = "0"
register "pci_int[1]" = "10"
register "pci_int[2]" = "0"
register "pci_int[3]" = "0"
register "pci_int_pin[0]" = "0"
register "pci_int_pin[1]" = "7"
register "pci_int_pin[2]" = "0"
register "pci_int_pin[3]" = "0"
# Keyboard Emulation Logic IRQs
# Enable keyboard IRQ2
register "enable_kel_keyb_irq" = "0"
# Enable mouse IRQ12
register "enable_kel_mouse_irq" = "0"
# Configure KEL Emulation IRQ, 0 to disable
register "kel_emul_irq" = "0"
device pci f.3 on end # Audio
device pci f.4 on end # OHCI
device pci f.5 on end # EHCI
device pci f.6 off end # UDC controller
device pci f.7 off end # OTG controller
end
# chip drivers/pci/rtl8139
## device pci d.0 on end # Realtek LAN
# register "nic_irq" = "10"
# end
end
end
*/
/{
mainboard_vendor = "Artec Group";
mainboard_name = "DBE61";
mainboard_pci_subsystem_vendor = "0x1022";
mainboard_pci_subsystem_device = "0x2323";
cpus { };
apic@0 {
/config/("northbridge/amd/geodelx/apic");
};
domain@0 {
/config/("northbridge/amd/geodelx/domain");
pci@1,0 {
/config/("northbridge/amd/geodelx/pci");
/* Video RAM has to be in 2MB chunks. */
/* 16MB for now, as 8MB would not be enough for WinCE */
geode_video_mb = "16";
};
pci@1,1 { /* Graphics */
};
pci@1,2 { /* AES */
};
pci@f,0 {
/config/("southbridge/amd/cs5536/dts");
/* Interrupt enables for LPC bus.
* Each bit is an IRQ 0-15. */
lpc_serirq_enable = "0x00001002";
/* LPC IRQ polarity. Each bit is an IRQ 0-15. */
lpc_serirq_polarity = "0x0000EFFD";
/* 0:continuous 1:quiet */
lpc_serirq_mode = "1";
/* GPIO(0-0x20) for INT D:C:B:A, 0xFF=none.
* See virtual PIC spec. */
enable_gpio_int_route = "0x0D0C0700";
/* 0:IDE; 1:FLASH on CS0, 2:FLASH on CS1, 3:FLASH on CS2, 4:FLASH on CS3. */
enable_ide_nand_flash = "2";
/* COM1 settings */
com1_enable = "0";
com1_address = "0x2f8";
com1_irq = "3";
/* COM2 settings */
com2_enable = "1";
com2_address = "0x3f8";
com2_irq = "4";
/* USB Port Power Handling setting. */
pph = "0xf5";
};
pci@f,1 {
/config/("southbridge/amd/cs5536/nand");
};
};
};
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