summaryrefslogtreecommitdiffstats
path: root/southbridge/via/vt8237/Makefile
blob: 987c575e1dcca66a500e4b5c7638ff9f354f8175 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
##
## This file is part of the coreboot project.
##
## Copyright (C) 2008 Corey Osgood <corey.osgood@gmail.com>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
##

ifeq ($(CONFIG_SOUTHBRIDGE_VIA_VT8237),y)

STAGE2_CHIPSET_SRC += $(src)/southbridge/via/vt8237/vt8237.c \
			$(src)/southbridge/via/vt8237/lpc.c \
			$(src)/southbridge/via/vt8237/ide.c \
			$(src)/southbridge/via/vt8237/sata.c

ifeq ($(CONFIG_PIRQ_TABLE),y)
STAGE2_CHIPSET_SRC += $(src)/southbridge/intel/i82801gx/irq_tables.c
endif


endif