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authorMichael Kinney <michael.d.kinney@intel.com>2016-11-29 01:05:05 -0800
committerMichael Kinney <michael.d.kinney@intel.com>2016-11-29 08:17:50 -0800
commit890f11d4286b29f008a0deecd2bf01b4d767c118 (patch)
tree31d051a409750734002fb729e40056e5f59b2c70
parenteadc05bd9237a716dc4c7cbe86806c2e27205ea7 (diff)
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Vlv2TbltDevicePkg/PlatformInitPei: Workaround unaligned SMRAM size
https://bugzilla.tianocore.org/show_bug.cgi?id=260 The PiSmmCPuDxeSmm module requires the SMRR base address and length to be aligned. The memory initialization for Vlv2TbltDevicePkg produces an SMRAM base address that is on a 16MB boundary and an SMRAM length of 12MB. The SMRAM length is rounded up to 16MB. This is a workaround until the binary module that produces the gEfiSmmPeiSmramMemoryReserveGuid HOB is updated Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: David Wei <david.wei@intel.com> Cc: Mang Guo <mang.guo@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
-rw-r--r--Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.c15
-rw-r--r--Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h3
-rw-r--r--Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf3
3 files changed, 18 insertions, 3 deletions
diff --git a/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.c b/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.c
index cbfe78dd89..f8ea09a438 100644
--- a/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.c
+++ b/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.c
@@ -1,6 +1,6 @@
/** @file
- Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
@@ -820,6 +820,19 @@ PlatformEarlyInitEntry (
EFI_PLATFORM_INFO_HOB *PlatformInfo;
EFI_PEI_HOB_POINTERS Hob;
EFI_PLATFORM_CPU_INFO PlatformCpuInfo;
+ EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *DescriptorBlock;
+ UINT64 Size;
+
+ //
+ // Make sure last SMRAM region is aligned
+ //
+ Hob.Raw = GetFirstGuidHob (&gEfiSmmPeiSmramMemoryReserveGuid);
+ if (Hob.Raw != NULL) {
+ DescriptorBlock = GET_GUID_HOB_DATA (Hob.Raw);
+ Size = DescriptorBlock->Descriptor[DescriptorBlock->NumberOfSmmReservedRegions - 1].PhysicalSize;
+ Size = LShiftU64 (1, HighBitSet64 (Size - 1) + 1);
+ DescriptorBlock->Descriptor[DescriptorBlock->NumberOfSmmReservedRegions - 1].PhysicalSize = Size;
+ }
//
// Initialize SmbusPolicy PPI
diff --git a/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h b/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h
index c2cdfa3900..c280fb8c4d 100644
--- a/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h
+++ b/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h
@@ -1,6 +1,6 @@
/*++
- Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
@@ -83,6 +83,7 @@ Abstract:
#include <Ppi/MasterBootMode.h>
#include <Guid/PlatformCpuInfo.h>
#include <Guid/OsSelection.h>
+#include <Guid/SmramMemoryReserve.h>
#define SMC_LAN_ON 0x46
#define SMC_LAN_OFF 0x47
diff --git a/Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf b/Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf
index fc517ef6f3..309487d854 100644
--- a/Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf
+++ b/Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf
@@ -1,6 +1,6 @@
#
#
-# Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
+# Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved
#
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
@@ -102,6 +102,7 @@ ENTRY_POINT = PlatformEarlyInitEntry
gEfiNormalSetupGuid
gEfiMemoryTypeInformationGuid
gOsSelectionVariableGuid
+ gEfiSmmPeiSmramMemoryReserveGuid
[Pcd.common]
gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase