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authorRuiyu Ni <ruiyu.ni@intel.com>2017-06-02 15:45:42 +0800
committerRuiyu Ni <ruiyu.ni@intel.com>2017-06-02 15:57:04 +0800
commitfc2ef2115f8151aa2b94806f1c646f851a0dada7 (patch)
tree4acb90e987fd57347cf48363d7ec0b9689316873 /MdeModulePkg/Bus/Pci
parent121e15a578629fefa3a3f132756c57fdc0705945 (diff)
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MdeModulePkg/Xhci: Correct the indention of comments
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> (cherry picked from commit b0b626ea2f16faca9f864599384fd184a89e0195)
Diffstat (limited to 'MdeModulePkg/Bus/Pci')
-rw-r--r--MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
index 2ad5ffd396..078e9e5e30 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
@@ -1369,10 +1369,10 @@ XhciDelAllAsyncIntTransfers (
EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {
Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList);
- //
- // Device doesn't finish the IntTransfer until real data comes
- // So the TRB should be removed as well.
- //
+ //
+ // Device doesn't finish the IntTransfer until real data comes
+ // So the TRB should be removed as well.
+ //
Status = XhcDequeueTrbFromEndpoint (Xhc, Urb);
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "XhciDelAllAsyncIntTransfers: XhcDequeueTrbFromEndpoint failed\n"));