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authorHao Wu <hao.a.wu@intel.com>2018-10-18 12:52:04 +0800
committerHao Wu <hao.a.wu@intel.com>2018-10-25 12:41:19 +0800
commit5687ae57232b85d32311d74190031a4dab28c52b (patch)
tree175588d3d0b4d2c1234198a50829e139e766ec16 /MdeModulePkg/Bus/Pci
parentebb6c7633bca47fcd5b460a67e18e4a717ea91cc (diff)
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MdeModulePkg/NvmExpressDxe: Always copy CQ entry to PassThru packet
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1259 According to the the NVM Express spec Revision 1.1, for some commands, command-related information will be stored in the Dword 0 of the completion queue entry. One case is for the Get Features Command (Section 5.9.2 of the spec), Dword 0 of the completion queue entry may contain feature information. Hence, this commit will always copy the content of completion queue entry to the PassThru packet regardless of the execution result of the command. Cc: Liangcheng Tang <liangcheng.tang@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Diffstat (limited to 'MdeModulePkg/Bus/Pci')
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
index bfcd349794..c52e960771 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
@@ -781,17 +781,16 @@ NvmExpressPassThru (
} else {
Status = EFI_DEVICE_ERROR;
//
- // Copy the Respose Queue entry for this command to the callers response buffer
- //
- CopyMem(Packet->NvmeCompletion, Cq, sizeof(EFI_NVM_EXPRESS_COMPLETION));
-
- //
// Dump every completion entry status for debugging.
//
DEBUG_CODE_BEGIN();
NvmeDumpStatus(Cq);
DEBUG_CODE_END();
}
+ //
+ // Copy the Respose Queue entry for this command to the callers response buffer
+ //
+ CopyMem(Packet->NvmeCompletion, Cq, sizeof(EFI_NVM_EXPRESS_COMPLETION));
} else {
//
// Timeout occurs for an NVMe command. Reset the controller to abort the