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authorJeff Brasen <jbrasen@nvidia.com>2018-10-10 01:50:36 +0800
committerHao Wu <hao.a.wu@intel.com>2018-10-12 15:46:04 +0800
commitbdf038ccff13b2a9d1146598029aa2d6824c4c05 (patch)
treeec976944412c02bc40c3b2351ed91249436746ba /MdeModulePkg/Bus/Pci
parent9343d0a1cd09544686b14dba5b428d7bc811f6b9 (diff)
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MdeModulePkg/SdMmcPciHcDxe: Add controller version defines
Add SDHCI controller defines, this is useful as the version in the register does not explictly map to a specification version. For example vesion 4.10 of the specification is version 0x04. https://bugzilla.tianocore.org/show_bug.cgi?id=1233 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Diffstat (limited to 'MdeModulePkg/Bus/Pci')
-rw-r--r--MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c4
-rw-r--r--MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c2
-rw-r--r--MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h10
3 files changed, 13 insertions, 3 deletions
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c
index 8c93933bc6..d3f77edfea 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c
@@ -978,9 +978,9 @@ SdCardIdentification (
return Status;
}
- if ((ControllerVer & 0xFF) == 2) {
+ if ((ControllerVer & 0xFF) == SD_MMC_HC_CTRL_VER_300) {
S18r = TRUE;
- } else if (((ControllerVer & 0xFF) == 0) || ((ControllerVer & 0xFF) == 1)) {
+ } else if (((ControllerVer & 0xFF) == SD_MMC_HC_CTRL_VER_100) || ((ControllerVer & 0xFF) == SD_MMC_HC_CTRL_VER_200)) {
S18r = FALSE;
} else {
ASSERT (FALSE);
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
index 25771dc9de..3b9a184bc4 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
@@ -782,7 +782,7 @@ SdMmcHcClockSupply (
//
// Set SDCLK Frequency Select and Internal Clock Enable fields in Clock Control register.
//
- if ((ControllerVer & 0xFF) == 2) {
+ if ((ControllerVer & 0xFF) == SD_MMC_HC_CTRL_VER_300) {
ASSERT (Divisor <= 0x3FF);
ClockCtrl = ((Divisor & 0xFF) << 8) | ((Divisor & 0x300) >> 2);
} else if (((ControllerVer & 0xFF) == 0) || ((ControllerVer & 0xFF) == 1)) {
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h
index e389d52184..7e3f588e0a 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h
@@ -135,6 +135,16 @@ typedef struct {
UINT32 Hs400:1; // bit 63
} SD_MMC_HC_SLOT_CAP;
+//
+// SD Host controller version
+//
+#define SD_MMC_HC_CTRL_VER_100 0x00
+#define SD_MMC_HC_CTRL_VER_200 0x01
+#define SD_MMC_HC_CTRL_VER_300 0x02
+#define SD_MMC_HC_CTRL_VER_400 0x03
+#define SD_MMC_HC_CTRL_VER_410 0x04
+#define SD_MMC_HC_CTRL_VER_420 0x05
+
/**
Dump the content of SD/MMC host controller's Capability Register.