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| author | Yao, Jiewen <jiewen.yao@intel.com> | 2019-02-22 21:30:34 +0800 |
|---|---|---|
| committer | Liming Gao <liming.gao@intel.com> | 2019-02-28 09:39:47 +0800 |
| commit | 0aac2f777a688a146050bed47753e2dcf801d3c7 (patch) | |
| tree | f8b7e0a818354fecd0a41d4fecf3be88db88b8b5 /MdePkg/Library/BaseLib/X64 | |
| parent | 68edd7dbad77d7170ee0e1c5dbefae93ea9997b1 (diff) | |
| download | edk2-0aac2f777a688a146050bed47753e2dcf801d3c7.tar.gz edk2-0aac2f777a688a146050bed47753e2dcf801d3c7.tar.bz2 edk2-0aac2f777a688a146050bed47753e2dcf801d3c7.zip | |
MdePkg/BaseLib: Add Shadow Stack Support for X86.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1521
This patch adds SSP - shadow stack pointer to JumpBuffer.
It will be used for the platform that enabled CET/ShadowStack.
We add gEfiMdePkgTokenSpaceGuid.PcdControlFlowEnforcementPropertyMask
to control the global enable/disable.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yao Jiewen <jiewen.yao@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'MdePkg/Library/BaseLib/X64')
| -rw-r--r-- | MdePkg/Library/BaseLib/X64/LongJump.nasm | 27 | ||||
| -rw-r--r-- | MdePkg/Library/BaseLib/X64/SetJump.nasm | 23 |
2 files changed, 48 insertions, 2 deletions
diff --git a/MdePkg/Library/BaseLib/X64/LongJump.nasm b/MdePkg/Library/BaseLib/X64/LongJump.nasm index 3bac27469e..2b38ef0b25 100644 --- a/MdePkg/Library/BaseLib/X64/LongJump.nasm +++ b/MdePkg/Library/BaseLib/X64/LongJump.nasm @@ -1,6 +1,6 @@ ;------------------------------------------------------------------------------
;
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@@ -19,9 +19,13 @@ ;
;------------------------------------------------------------------------------
+%include "Nasm.inc"
+
DEFAULT REL
SECTION .text
+extern ASM_PFX(PcdGet32 (PcdControlFlowEnforcementPropertyMask))
+
;------------------------------------------------------------------------------
; VOID
; EFIAPI
@@ -32,6 +36,27 @@ ;------------------------------------------------------------------------------
global ASM_PFX(InternalLongJump)
ASM_PFX(InternalLongJump):
+
+ mov eax, [ASM_PFX(PcdGet32 (PcdControlFlowEnforcementPropertyMask))]
+ test eax, eax
+ jz CetDone
+ mov rax, cr4
+ bt eax, 23 ; check if CET is enabled
+ jnc CetDone
+
+ push rdx ; save rdx
+
+ mov rdx, [rcx + 0xF8] ; rdx = target SSP
+ READSSP_RAX
+ sub rdx, rax ; rdx = delta
+ mov rax, rdx ; rax = delta
+
+ shr rax, 3 ; rax = delta/sizeof(UINT64)
+ INCSSP_RAX
+
+ pop rdx ; restore rdx
+CetDone:
+
mov rbx, [rcx]
mov rsp, [rcx + 8]
mov rbp, [rcx + 0x10]
diff --git a/MdePkg/Library/BaseLib/X64/SetJump.nasm b/MdePkg/Library/BaseLib/X64/SetJump.nasm index b1d0ff7121..b491df896d 100644 --- a/MdePkg/Library/BaseLib/X64/SetJump.nasm +++ b/MdePkg/Library/BaseLib/X64/SetJump.nasm @@ -1,6 +1,6 @@ ;------------------------------------------------------------------------------
;
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@@ -19,10 +19,13 @@ ;
;------------------------------------------------------------------------------
+%include "Nasm.inc"
+
DEFAULT REL
SECTION .text
extern ASM_PFX(InternalAssertJumpBuffer)
+extern ASM_PFX(PcdGet32 (PcdControlFlowEnforcementPropertyMask))
;------------------------------------------------------------------------------
; UINTN
@@ -39,6 +42,24 @@ ASM_PFX(SetJump): add rsp, 0x20
pop rcx
pop rdx
+
+ xor rax, rax
+ mov [rcx + 0xF8], rax ; save 0 to SSP
+
+ mov eax, [ASM_PFX(PcdGet32 (PcdControlFlowEnforcementPropertyMask))]
+ test eax, eax
+ jz CetDone
+ mov rax, cr4
+ bt eax, 23 ; check if CET is enabled
+ jnc CetDone
+
+ mov rax, 1
+ INCSSP_RAX ; to read original SSP
+ READSSP_RAX
+ mov [rcx + 0xF8], rax ; save SSP
+
+CetDone:
+
mov [rcx], rbx
mov [rcx + 8], rsp
mov [rcx + 0x10], rbp
|