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| author | Ceping Sun <cepingx.sun@intel.com> | 2024-08-29 21:21:48 -0400 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-09-09 02:57:02 +0000 |
| commit | 043615ae8b0df9635b509643fe1d5cedb6e1a64d (patch) | |
| tree | 98efee14b30cc046bc8ead30148da1b61066102b /MdePkg | |
| parent | b437b5ca4c1a6725897dfd0740de6ef20cacd226 (diff) | |
| download | edk2-043615ae8b0df9635b509643fe1d5cedb6e1a64d.tar.gz edk2-043615ae8b0df9635b509643fe1d5cedb6e1a64d.tar.bz2 edk2-043615ae8b0df9635b509643fe1d5cedb6e1a64d.zip | |
MdePkg/BaseLib: Add NULL version Tdx functions for other architectures
Currently, the NULL version Tdx functions are only built for Ia32.
In BaseLib, the others architectures also need such NULL version
Tdx functions.
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Signed-off-by: Ceping Sun <cepingx.sun@intel.com>
Diffstat (limited to 'MdePkg')
| -rw-r--r-- | MdePkg/Include/Library/BaseLib.h | 4 | ||||
| -rw-r--r-- | MdePkg/Library/BaseLib/BaseLib.inf | 5 |
2 files changed, 5 insertions, 4 deletions
diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h index eb817f131f..9658026d9c 100644 --- a/MdePkg/Include/Library/BaseLib.h +++ b/MdePkg/Include/Library/BaseLib.h @@ -5259,8 +5259,6 @@ SpeculationBarrier ( VOID
);
-#if defined (MDE_CPU_X64) || defined (MDE_CPU_IA32)
-
/**
The TDCALL instruction causes a VM exit to the Intel TDX module. It is
used to call guest-side Intel TDX functions, either local or a TD exit
@@ -5323,8 +5321,6 @@ TdIsEnabled ( VOID
);
-#endif
-
#if defined (MDE_CPU_X64)
//
// The page size for the PVALIDATE instruction
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf index e3336c5dfb..317d32cf68 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -339,6 +339,7 @@ Ebc/SpeculationBarrier.c
Unaligned.c
Math64.c
+ IntelTdxNull.c
[Sources.ARM]
Arm/InternalSwitchStack.c
@@ -364,6 +365,7 @@ Arm/CpuBreakpoint.S | GCC
Arm/MemoryFence.S | GCC
Arm/SpeculationBarrier.S | GCC
+ IntelTdxNull.c
[Sources.AARCH64]
Arm/InternalSwitchStack.c
@@ -391,6 +393,7 @@ AArch64/SpeculationBarrier.asm | MSFT
AArch64/ArmReadCntPctReg.asm | MSFT
AArch64/ArmReadIdAA64Isar0Reg.asm | MSFT
+ IntelTdxNull.c
[Sources.RISCV64]
Math64.c
@@ -412,6 +415,7 @@ RiscV64/ReadTimer.S | GCC
RiscV64/RiscVMmu.S | GCC
RiscV64/SpeculationBarrier.S | GCC
+ IntelTdxNull.c
[Sources.LOONGARCH64]
Math64.c
@@ -432,6 +436,7 @@ LoongArch64/ExceptionBase.S | GCC
LoongArch64/Cpucfg.S | GCC
LoongArch64/ReadStableCounter.S | GCC
+ IntelTdxNull.c
[Packages]
MdePkg/MdePkg.dec
|