diff options
Diffstat (limited to 'OvmfPkg')
| -rw-r--r-- | OvmfPkg/IntelTdx/Sec/SecMain.c | 12 | ||||
| -rw-r--r-- | OvmfPkg/Sec/SecMain.c | 15 |
2 files changed, 27 insertions, 0 deletions
diff --git a/OvmfPkg/IntelTdx/Sec/SecMain.c b/OvmfPkg/IntelTdx/Sec/SecMain.c index 95a31af029..7f2d28af95 100644 --- a/OvmfPkg/IntelTdx/Sec/SecMain.c +++ b/OvmfPkg/IntelTdx/Sec/SecMain.c @@ -68,6 +68,18 @@ SecMtrrSetup ( return;
}
+ if (CcProbe () == CcGuestTypeIntelTdx) {
+ //
+ // According to TDX Spec, the default MTRR type is enforced to WB
+ // and CR0.CD is enforced to 0.
+ // The TD guest has to disable MTRR otherwise it tries to
+ // program MTRRs to disable caching. CR0.CD=1 results in the
+ // unexpected #VE.
+ //
+ DEBUG ((DEBUG_INFO, "%a: Skip TD-Guest\n", __func__));
+ return;
+ }
+
DefType.Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);
DefType.Bits.Type = MSR_IA32_MTRR_CACHE_WRITE_BACK;
DefType.Bits.E = 1; /* enable */
diff --git a/OvmfPkg/Sec/SecMain.c b/OvmfPkg/Sec/SecMain.c index c1c08a947a..d13a948509 100644 --- a/OvmfPkg/Sec/SecMain.c +++ b/OvmfPkg/Sec/SecMain.c @@ -764,6 +764,21 @@ SecMtrrSetup ( return;
}
+ #if defined (TDX_GUEST_SUPPORTED)
+ if (CcProbe () == CcGuestTypeIntelTdx) {
+ //
+ // According to TDX Spec, the default MTRR type is enforced to WB
+ // and CR0.CD is enforced to 0.
+ // The TD guest has to disable MTRR otherwise it tries to
+ // program MTRRs to disable caching. CR0.CD=1 results in the
+ // unexpected #VE.
+ //
+ DEBUG ((DEBUG_INFO, "%a: Skip TD-Guest\n", __func__));
+ return;
+ }
+
+ #endif
+
DefType.Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);
DefType.Bits.Type = MSR_IA32_MTRR_CACHE_WRITE_BACK;
DefType.Bits.E = 1; /* enable */
|