From 3053183d417ae9e72fa05fd858ad6da15cbef7f9 Mon Sep 17 00:00:00 2001
From: "Brijesh Singh via groups.io" <brijesh.singh=amd.com@groups.io>
Date: Thu, 9 Dec 2021 11:27:32 +0800
Subject: OvmfPkg/ResetVector: introduce SEV metadata descriptor for VMM use

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

The OvmfPkgX86 build reserves memory regions in MEMFD. The memory regions
get accessed in the SEC phase. AMD SEV-SNP require that the guest's
private memory be accepted or validated before access.

Introduce a Guided metadata structure that describes the reserved memory
regions. The VMM can locate the metadata structure by iterating through
the reset vector guid and process the areas based on the platform
specific requirements.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
---
 OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm | 14 ++++++++++++
 OvmfPkg/ResetVector/ResetVector.nasmb        |  1 +
 OvmfPkg/ResetVector/X64/OvmfSevMetadata.asm  | 34 ++++++++++++++++++++++++++++
 3 files changed, 49 insertions(+)
 create mode 100644 OvmfPkg/ResetVector/X64/OvmfSevMetadata.asm

diff --git a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
index dee2e3f9de..12f2cedd67 100644
--- a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
+++ b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
@@ -64,6 +64,20 @@ tdxMetadataOffsetStart:
     DB      0x86, 0x5e, 0x46, 0x85, 0xa7, 0xbf, 0x8e, 0xc2
 tdxMetadataOffsetEnd:
 
+;
+; SEV metadata descriptor
+;
+; Provide the start offset of the metadata blob within the OVMF binary.
+
+; GUID : dc886566-984a-4798-A75e-5585a7bf67cc
+;
+OvmfSevMetadataOffsetStart:
+  DD      (fourGigabytes - OvmfSevMetadataGuid)
+  DW      OvmfSevMetadataOffsetEnd - OvmfSevMetadataOffsetStart
+  DB      0x66, 0x65, 0x88, 0xdc, 0x4a, 0x98, 0x98, 0x47
+  DB      0xA7, 0x5e, 0x55, 0x85, 0xa7, 0xbf, 0x67, 0xcc
+OvmfSevMetadataOffsetEnd:
+
 %endif
 
 ; SEV Hash Table Block
diff --git a/OvmfPkg/ResetVector/ResetVector.nasmb b/OvmfPkg/ResetVector/ResetVector.nasmb
index 87effedb9c..d847794fea 100644
--- a/OvmfPkg/ResetVector/ResetVector.nasmb
+++ b/OvmfPkg/ResetVector/ResetVector.nasmb
@@ -109,6 +109,7 @@
 %include "Ia32/AmdSev.asm"
 %include "Ia32/PageTables64.asm"
 %include "Ia32/IntelTdx.asm"
+%include "X64/OvmfSevMetadata.asm"
 %endif
 
 %include "Ia16/Real16ToFlat32.asm"
diff --git a/OvmfPkg/ResetVector/X64/OvmfSevMetadata.asm b/OvmfPkg/ResetVector/X64/OvmfSevMetadata.asm
new file mode 100644
index 0000000000..9d8c3e8194
--- /dev/null
+++ b/OvmfPkg/ResetVector/X64/OvmfSevMetadata.asm
@@ -0,0 +1,34 @@
+;-----------------------------------------------------------------------------
+; @file
+; OVMF metadata for the AMD SEV confidential computing guests
+;
+; Copyright (c) 2021, AMD Inc. All rights reserved.<BR>
+;
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;-----------------------------------------------------------------------------
+
+BITS  64
+
+%define OVMF_SEV_METADATA_VERSION     1
+
+; The section must be accepted or validated by the VMM before the boot
+%define OVMF_SECTION_TYPE_SNP_SEC_MEM     0x1
+
+ALIGN 16
+
+TIMES (15 - ((OvmfSevGuidedStructureEnd - OvmfSevGuidedStructureStart + 15) % 16)) DB 0
+
+OvmfSevGuidedStructureStart:
+;
+; OvmfSev metadata descriptor
+;
+OvmfSevMetadataGuid:
+
+_DescriptorSev:
+  DB 'A','S','E','V'                                        ; Signature
+  DD OvmfSevGuidedStructureEnd - _DescriptorSev             ; Length
+  DD OVMF_SEV_METADATA_VERSION                              ; Version
+  DD (OvmfSevGuidedStructureEnd - _DescriptorSev - 16) / 12 ; Number of sections
+
+OvmfSevGuidedStructureEnd:
+  ALIGN   16
-- 
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