From e1f5c6249af08c1df2c6257e4bb6abbf6134318c Mon Sep 17 00:00:00 2001 From: Giri Mudusuru Date: Fri, 12 May 2023 17:54:54 +0800 Subject: MdeModulePkg SdMmcPciHcDxe: SD/MMC capability debug print is incorrect REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4394 Fix DumpCapabilityReg() debug log to print 64 bit capability instead of 32 bit pointer Cc: Hao A Wu Cc: Ray Ni Cc: Jian J Wang Cc: Liming Gao Cc: Andrew Fish Signed-off-by: Giri Mudusuru Reviewed-by: Ard Biesheuvel Reviewed-by: Hao A Wu --- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c index aab6815328..2e7497a89d 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c @@ -30,7 +30,7 @@ DumpCapabilityReg ( // // Dump Capability Data // - DEBUG ((DEBUG_INFO, " == Slot [%d] Capability is 0x%x ==\n", Slot, Capability)); + DEBUG ((DEBUG_INFO, " == Slot [%d] Capability is 0x%llx ==\n", Slot, *(UINT64 *)Capability)); DEBUG ((DEBUG_INFO, " Timeout Clk Freq %d%a\n", Capability->TimeoutFreq, (Capability->TimeoutUnit) ? "MHz" : "KHz")); DEBUG ((DEBUG_INFO, " Base Clk Freq %dMHz\n", Capability->BaseClkFreq)); DEBUG ((DEBUG_INFO, " Max Blk Len %dbytes\n", 512 * (1 << Capability->MaxBlkLen))); -- cgit v1.2.3