From 1a0db79125bad94aaaa97e1146100594a1471382 Mon Sep 17 00:00:00 2001 From: Ard Biesheuvel Date: Tue, 15 Dec 2015 15:01:42 +0000 Subject: ArmPkg: use unified asm syntax for CLANG The CLANG assembler does not support the legacy, non-unified assembler syntax, i.e., it does not support the reordering of the condition suffixes with the increment/decrement before/after or byte/word suffixes, and it does not recognize the 'empty descending' (ED) suffix at all. So move to the unified syntax, and replace 'empty descending' with 'decrement after' or 'increment before' as appropriate. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19280 6f19259b-4bc3-4df7-8a09-765794883524 --- ArmPkg/Drivers/CpuDxe/Arm/ExceptionSupport.S | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'ArmPkg/Drivers') diff --git a/ArmPkg/Drivers/CpuDxe/Arm/ExceptionSupport.S b/ArmPkg/Drivers/CpuDxe/Arm/ExceptionSupport.S index 3433b99cd4..673b931297 100644 --- a/ArmPkg/Drivers/CpuDxe/Arm/ExceptionSupport.S +++ b/ArmPkg/Drivers/CpuDxe/Arm/ExceptionSupport.S @@ -60,6 +60,7 @@ GCC_ASM_EXPORT(AsmCommonExceptionEntry) GCC_ASM_EXPORT(CommonCExceptionHandler) .text +.syntax unified #if !defined(__APPLE__) .fpu neon @ makes vpush/vpop assemble #endif @@ -223,9 +224,9 @@ ASM_PFX(AsmCommonExceptionEntry): and R3, R1, #0x1f @ Check CPSR to see if User or System Mode cmp R3, #0x1f @ if ((CPSR == 0x10) || (CPSR == 0x1f)) cmpne R3, #0x10 @ - stmeqed R2, {lr}^ @ save unbanked lr + stmdaeq R2, {lr}^ @ save unbanked lr @ else - stmneed R2, {lr} @ save SVC lr + stmdane R2, {lr} @ save SVC lr ldr R5, [SP, #0x58] @ PC is the LR pushed by srsfd @@ -290,9 +291,9 @@ CommonCExceptionHandler ( and R1, R1, #0x1f @ Check to see if User or System Mode cmp R1, #0x1f @ if ((CPSR == 0x10) || (CPSR == 0x1f)) cmpne R1, #0x10 @ - ldmeqed R2, {lr}^ @ restore unbanked lr + ldmibeq R2, {lr}^ @ restore unbanked lr @ else - ldmneed R3, {lr} @ restore SVC lr, via ldmfd SP!, {LR} + ldmibne R3, {lr} @ restore SVC lr, via ldmfd SP!, {LR} ldmfd SP!,{R0-R12} @ Restore general purpose registers @ Exception handler can not change SP -- cgit v1.2.3