From 4f92cfa44d1141d9e57cceac0386c08b4be86d58 Mon Sep 17 00:00:00 2001 From: Rebecca Cran Date: Sun, 7 Feb 2021 17:52:41 -0700 Subject: ArmPkg: Add definition of the maximum cache level in ARMv8-A The ARM Architecture Reference Manual for ARMv8-A defines up to seven levels of cache, L1 through L7. Define MAX_ARM_CACHE_LEVEL to be 7. Signed-off-by: Rebecca Cran Reviewed-by: Leif Lindholm Reviewed-by: Sami Mujawar --- ArmPkg/Include/Library/ArmLib.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'ArmPkg/Include') diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h index 26cb05def0..fd4f06d242 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -109,6 +109,10 @@ typedef enum { #define GET_MPID(ClusterId, CoreId) (((ClusterId) << 8) | (CoreId)) #define PRIMARY_CORE_ID (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK) +// The ARM Architecture Reference Manual for ARMv8-A defines up +// to 7 levels of cache, L1 through L7. +#define MAX_ARM_CACHE_LEVEL 7 + UINTN EFIAPI ArmDataCacheLineLength ( -- cgit v1.2.3