From 8e4cb8fbceb84b66b3b2fc45b9e93d70f732e970 Mon Sep 17 00:00:00 2001 From: "wenyi,xie via groups.io" Date: Tue, 8 Dec 2020 21:07:49 +0800 Subject: ArmPkg/ArmDisassemblerLib: fix incorrect comparison As shift = (OpCode >> 5) & 0x3, shift will never be larger than 0x3, so the comparison between shift and 0x12 will always be false. The right shift type of ASR is 0x2. Cc: Leif Lindholm Cc: Ard Biesheuvel Signed-off-by: Wenyi Xie Reviewed-by: Leif Lindholm --- ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ArmPkg/Library') diff --git a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c index b4f0f8dbbf..d206cf4ea9 100644 --- a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c +++ b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c @@ -240,7 +240,7 @@ DisassembleArmInstruction ( if (shift_imm == 0) { shift_imm = 32; } - } else if (shift == 0x12) { + } else if (shift == 0x2) { Type = "ASR"; } else if (shift_imm == 0) { AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, RRX]%a", gReg[Rn], SIGN (U), gReg[Rm], WRITE (W)); @@ -270,7 +270,7 @@ DisassembleArmInstruction ( if (shift_imm == 0) { shift_imm = 32; } - } else if (shift == 0x12) { + } else if (shift == 0x2) { Type = "ASR"; } else if (shift_imm == 0) { AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, RRX", gReg[Rn], SIGN (U), gReg[Rm]); -- cgit v1.2.3