From 8df52631e53c73cbe5ef037155cc5b6bdc87f757 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Wed, 10 Jul 2019 16:53:11 +0200 Subject: ArmPlatformPkg: Actually disable PL031 interrupts The PL031 interrupt mask register (IMSC) is not very clearly documented in the PL031 specification. However, bit 0 (RTCIMSC) indicates whether interrupts are enabled, not disabled. So before this commit, we were actually *enabling* interrupts for the RTC. This patch changes the logic to instead disable interrupts when they are not disabled already. Signed-off-by: Alexander Graf Reviewed-by: Leif Lindholm --- ArmPlatformPkg/Library/PL031RealTimeClockLib/PL031RealTimeClockLib.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ArmPlatformPkg') diff --git a/ArmPlatformPkg/Library/PL031RealTimeClockLib/PL031RealTimeClockLib.c b/ArmPlatformPkg/Library/PL031RealTimeClockLib/PL031RealTimeClockLib.c index b630a5cfbf..75c95985d4 100644 --- a/ArmPlatformPkg/Library/PL031RealTimeClockLib/PL031RealTimeClockLib.c +++ b/ArmPlatformPkg/Library/PL031RealTimeClockLib/PL031RealTimeClockLib.c @@ -80,8 +80,8 @@ InitializePL031 ( } // Ensure interrupts are masked. We do not want RTC interrupts in UEFI - if ((MmioRead32 (mPL031RtcBase + PL031_RTC_IMSC_IRQ_MASK_SET_CLEAR_REGISTER) & PL031_SET_IRQ_MASK) != PL031_SET_IRQ_MASK) { - MmioOr32 (mPL031RtcBase + PL031_RTC_IMSC_IRQ_MASK_SET_CLEAR_REGISTER, PL031_SET_IRQ_MASK); + if ((MmioRead32 (mPL031RtcBase + PL031_RTC_IMSC_IRQ_MASK_SET_CLEAR_REGISTER) & PL031_SET_IRQ_MASK) != 0) { + MmioWrite32 (mPL031RtcBase + PL031_RTC_IMSC_IRQ_MASK_SET_CLEAR_REGISTER, 0); } // Clear any existing interrupts -- cgit v1.2.3