From dab7bac94c6ca31b9c9ed1da97eba7dade0c54a6 Mon Sep 17 00:00:00 2001 From: Pierre Gondois Date: Mon, 10 Oct 2022 11:20:54 +0200 Subject: DynamicTablesPkg: Add PCCT related objects Introduce the following CmObj in the ArmNameSpaceObjects: - CM_ARM_MAILBOX_REGISTER_INFO - CM_ARM_PCC_SUBSPACE_CHANNEL_TIMING_INFO - CM_ARM_PCC_SUBSPACE_GENERIC_INFO - CM_ARM_PCC_SUBPSACE_TYPE0_INFO - CM_ARM_PCC_SUBPSACE_TYPE1_INFO - CM_ARM_PCC_SUBPSACE_TYPE2_INFO - CM_ARM_PCC_SUBPSACE_TYPE3_INFO - CM_ARM_PCC_SUBPSACE_TYPE4_INFO - CM_ARM_PCC_SUBPSACE_TYPE5_INFO These objects allow to describe mailbox registers, pcc timings and PCCT subspaces. They prepare the enablement of a PCCT generator. Also add the CmObjParsers associated to each object. Signed-off-by: Pierre Gondois Reviewed-by: Sami Mujawar --- DynamicTablesPkg/Include/ArmNameSpaceObjects.h | 277 +++++++++++++++++---- .../ConfigurationManagerObjectParser.c | 107 ++++++++ 2 files changed, 341 insertions(+), 43 deletions(-) (limited to 'DynamicTablesPkg') diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h index d711f3ec59..6aafd41a2e 100644 --- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h +++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h @@ -22,49 +22,55 @@ in the ARM Namespace */ typedef enum ArmObjectID { - EArmObjReserved, ///< 0 - Reserved - EArmObjBootArchInfo, ///< 1 - Boot Architecture Info - EArmObjCpuInfo, ///< 2 - CPU Info - EArmObjPowerManagementProfileInfo, ///< 3 - Power Management Profile Info - EArmObjGicCInfo, ///< 4 - GIC CPU Interface Info - EArmObjGicDInfo, ///< 5 - GIC Distributor Info - EArmObjGicMsiFrameInfo, ///< 6 - GIC MSI Frame Info - EArmObjGicRedistributorInfo, ///< 7 - GIC Redistributor Info - EArmObjGicItsInfo, ///< 8 - GIC ITS Info - EArmObjSerialConsolePortInfo, ///< 9 - Serial Console Port Info - EArmObjSerialDebugPortInfo, ///< 10 - Serial Debug Port Info - EArmObjGenericTimerInfo, ///< 11 - Generic Timer Info - EArmObjPlatformGTBlockInfo, ///< 12 - Platform GT Block Info - EArmObjGTBlockTimerFrameInfo, ///< 13 - Generic Timer Block Frame Info - EArmObjPlatformGenericWatchdogInfo, ///< 14 - Platform Generic Watchdog - EArmObjPciConfigSpaceInfo, ///< 15 - PCI Configuration Space Info - EArmObjHypervisorVendorIdentity, ///< 16 - Hypervisor Vendor Id - EArmObjFixedFeatureFlags, ///< 17 - Fixed feature flags for FADT - EArmObjItsGroup, ///< 18 - ITS Group - EArmObjNamedComponent, ///< 19 - Named Component - EArmObjRootComplex, ///< 20 - Root Complex - EArmObjSmmuV1SmmuV2, ///< 21 - SMMUv1 or SMMUv2 - EArmObjSmmuV3, ///< 22 - SMMUv3 - EArmObjPmcg, ///< 23 - PMCG - EArmObjGicItsIdentifierArray, ///< 24 - GIC ITS Identifier Array - EArmObjIdMappingArray, ///< 25 - ID Mapping Array - EArmObjSmmuInterruptArray, ///< 26 - SMMU Interrupt Array - EArmObjProcHierarchyInfo, ///< 27 - Processor Hierarchy Info - EArmObjCacheInfo, ///< 28 - Cache Info - EArmObjReserved29, ///< 29 - Reserved - EArmObjCmRef, ///< 30 - CM Object Reference - EArmObjMemoryAffinityInfo, ///< 31 - Memory Affinity Info - EArmObjDeviceHandleAcpi, ///< 32 - Device Handle Acpi - EArmObjDeviceHandlePci, ///< 33 - Device Handle Pci - EArmObjGenericInitiatorAffinityInfo, ///< 34 - Generic Initiator Affinity - EArmObjSerialPortInfo, ///< 35 - Generic Serial Port Info - EArmObjCmn600Info, ///< 36 - CMN-600 Info - EArmObjLpiInfo, ///< 37 - Lpi Info - EArmObjPciAddressMapInfo, ///< 38 - Pci Address Map Info - EArmObjPciInterruptMapInfo, ///< 39 - Pci Interrupt Map Info - EArmObjRmr, ///< 40 - Reserved Memory Range Node - EArmObjMemoryRangeDescriptor, ///< 41 - Memory Range Descriptor - EArmObjCpcInfo, ///< 42 - Continuous Performance Control Info + EArmObjReserved, ///< 0 - Reserved + EArmObjBootArchInfo, ///< 1 - Boot Architecture Info + EArmObjCpuInfo, ///< 2 - CPU Info + EArmObjPowerManagementProfileInfo, ///< 3 - Power Management Profile Info + EArmObjGicCInfo, ///< 4 - GIC CPU Interface Info + EArmObjGicDInfo, ///< 5 - GIC Distributor Info + EArmObjGicMsiFrameInfo, ///< 6 - GIC MSI Frame Info + EArmObjGicRedistributorInfo, ///< 7 - GIC Redistributor Info + EArmObjGicItsInfo, ///< 8 - GIC ITS Info + EArmObjSerialConsolePortInfo, ///< 9 - Serial Console Port Info + EArmObjSerialDebugPortInfo, ///< 10 - Serial Debug Port Info + EArmObjGenericTimerInfo, ///< 11 - Generic Timer Info + EArmObjPlatformGTBlockInfo, ///< 12 - Platform GT Block Info + EArmObjGTBlockTimerFrameInfo, ///< 13 - Generic Timer Block Frame Info + EArmObjPlatformGenericWatchdogInfo, ///< 14 - Platform Generic Watchdog + EArmObjPciConfigSpaceInfo, ///< 15 - PCI Configuration Space Info + EArmObjHypervisorVendorIdentity, ///< 16 - Hypervisor Vendor Id + EArmObjFixedFeatureFlags, ///< 17 - Fixed feature flags for FADT + EArmObjItsGroup, ///< 18 - ITS Group + EArmObjNamedComponent, ///< 19 - Named Component + EArmObjRootComplex, ///< 20 - Root Complex + EArmObjSmmuV1SmmuV2, ///< 21 - SMMUv1 or SMMUv2 + EArmObjSmmuV3, ///< 22 - SMMUv3 + EArmObjPmcg, ///< 23 - PMCG + EArmObjGicItsIdentifierArray, ///< 24 - GIC ITS Identifier Array + EArmObjIdMappingArray, ///< 25 - ID Mapping Array + EArmObjSmmuInterruptArray, ///< 26 - SMMU Interrupt Array + EArmObjProcHierarchyInfo, ///< 27 - Processor Hierarchy Info + EArmObjCacheInfo, ///< 28 - Cache Info + EArmObjReserved29, ///< 29 - Reserved + EArmObjCmRef, ///< 30 - CM Object Reference + EArmObjMemoryAffinityInfo, ///< 31 - Memory Affinity Info + EArmObjDeviceHandleAcpi, ///< 32 - Device Handle Acpi + EArmObjDeviceHandlePci, ///< 33 - Device Handle Pci + EArmObjGenericInitiatorAffinityInfo, ///< 34 - Generic Initiator Affinity + EArmObjSerialPortInfo, ///< 35 - Generic Serial Port Info + EArmObjCmn600Info, ///< 36 - CMN-600 Info + EArmObjLpiInfo, ///< 37 - Lpi Info + EArmObjPciAddressMapInfo, ///< 38 - Pci Address Map Info + EArmObjPciInterruptMapInfo, ///< 39 - Pci Interrupt Map Info + EArmObjRmr, ///< 40 - Reserved Memory Range Node + EArmObjMemoryRangeDescriptor, ///< 41 - Memory Range Descriptor + EArmObjCpcInfo, ///< 42 - Continuous Performance Control Info + EArmObjPccSubspaceType0Info, ///< 43 - Pcc Subspace Type 0 Info + EArmObjPccSubspaceType1Info, ///< 44 - Pcc Subspace Type 2 Info + EArmObjPccSubspaceType2Info, ///< 45 - Pcc Subspace Type 2 Info + EArmObjPccSubspaceType3Info, ///< 46 - Pcc Subspace Type 3 Info + EArmObjPccSubspaceType4Info, ///< 47 - Pcc Subspace Type 4 Info + EArmObjPccSubspaceType5Info, ///< 48 - Pcc Subspace Type 5 Info EArmObjMax } EARM_OBJECT_ID; @@ -1095,6 +1101,191 @@ typedef struct CmArmRmrDescriptor { */ typedef AML_CPC_INFO CM_ARM_CPC_INFO; +/** A structure that describes a + PCC Mailbox Register. +*/ +typedef struct PccMailboxRegisterInfo { + /// GAS describing the Register. + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE Register; + + /** Mask of bits to preserve when writing. + + This mask is also used for registers. The Register is only read + and there is no write mask required. E.g.: + - Error Status mask (Cf. PCC Subspace types 3/4/5). + - Command Complete Check mask (Cf. PCC Subspace types 3/4/5). + */ + UINT64 PreserveMask; + + /// Mask of bits to set when writing. + UINT64 WriteMask; +} PCC_MAILBOX_REGISTER_INFO; + +/** A structure that describes the + PCC Subspace CHannel Timings. +*/ +typedef struct PccSubspaceChannelTimingInfo { + /// Expected latency to process a command, in microseconds. + UINT32 NominalLatency; + + /** Maximum number of periodic requests that the subspace channel can + support, reported in commands per minute. 0 indicates no limitation. + + This field is ignored for the PCC Subspace type 5 (HW Registers based). + */ + UINT32 MaxPeriodicAccessRate; + + /** Minimum amount of time that OSPM must wait after the completion + of a command before issuing the next command, in microseconds. + */ + UINT16 MinRequestTurnaroundTime; +} PCC_SUBSPACE_CHANNEL_TIMING_INFO; + +/** A structure that describes a + Generic PCC Subspace (Type 0). +*/ +typedef struct CmArmPccSubspaceGenericInfo { + /** Subspace Id. + + Cf. ACPI 6.4, s14.7 Referencing the PCC address space + Cf. s14.1.2 Platform Communications Channel Subspace Structures + The subspace ID of a PCC subspace is its index in the array of + subspace structures, starting with subspace 0. + + At most 256 subspaces are supported. + */ + UINT8 SubspaceId; + + /// Table type (or subspace). + UINT8 Type; + + /// Base address of the shared memory range. + /// This field is ignored for the PCC Subspace type 5 (HW Registers based). + UINT64 BaseAddress; + + /// Address length. + UINT64 AddressLength; + + /// Doorbell Register. + PCC_MAILBOX_REGISTER_INFO DoorbellReg; + + /// Mailbox Timings. + PCC_SUBSPACE_CHANNEL_TIMING_INFO ChannelTiming; +} PCC_SUBSPACE_GENERIC_INFO; + +/** A structure that describes a + PCC Subspace of type 0 (Generic). + + ID: EArmObjPccSubspaceType0Info +*/ +typedef PCC_SUBSPACE_GENERIC_INFO CM_ARM_PCC_SUBSPACE_TYPE0_INFO; + +/** A structure that describes a + PCC Subspace of type 1 (HW-Reduced). + + ID: EArmObjPccSubspaceType1Info +*/ +typedef struct CmArmPccSubspaceType1Info { + /** Generic Pcc information. + + The Subspace of Type0 contains information that can be re-used + in other Subspace types. + */ + PCC_SUBSPACE_GENERIC_INFO GenericPccInfo; + + /// Platform Interrupt. + CM_ARM_GENERIC_INTERRUPT PlatIrq; +} CM_ARM_PCC_SUBSPACE_TYPE1_INFO; + +/** A structure that describes a + PCC Subspace of type 2 (HW-Reduced). + + ID: EArmObjPccSubspaceType2Info +*/ +typedef struct CmArmPccSubspaceType2Info { + /** Generic Pcc information. + + The Subspace of Type0 contains information that can be re-used + in other Subspace types. + */ + PCC_SUBSPACE_GENERIC_INFO GenericPccInfo; + + /// Platform Interrupt. + CM_ARM_GENERIC_INTERRUPT PlatIrq; + + /// Platform Interrupt Register. + PCC_MAILBOX_REGISTER_INFO PlatIrqAckReg; +} CM_ARM_PCC_SUBSPACE_TYPE2_INFO; + +/** A structure that describes a + PCC Subspace of type 3 (Extended) + + ID: EArmObjPccSubspaceType3Info +*/ +typedef struct CmArmPccSubspaceType3Info { + /** Generic Pcc information. + + The Subspace of Type0 contains information that can be re-used + in other Subspace types. + */ + PCC_SUBSPACE_GENERIC_INFO GenericPccInfo; + + /// Platform Interrupt. + CM_ARM_GENERIC_INTERRUPT PlatIrq; + + /// Platform Interrupt Register. + PCC_MAILBOX_REGISTER_INFO PlatIrqAckReg; + + /// Command Complete Check Register. + /// The WriteMask field is not used. + PCC_MAILBOX_REGISTER_INFO CmdCompleteCheckReg; + + /// Command Complete Update Register. + PCC_MAILBOX_REGISTER_INFO CmdCompleteUpdateReg; + + /// Error Status Register. + /// The WriteMask field is not used. + PCC_MAILBOX_REGISTER_INFO ErrorStatusReg; +} CM_ARM_PCC_SUBSPACE_TYPE3_INFO; + +/** A structure that describes a + PCC Subspace of type 4 (Extended) + + ID: EArmObjPccSubspaceType4Info +*/ +typedef CM_ARM_PCC_SUBSPACE_TYPE3_INFO CM_ARM_PCC_SUBSPACE_TYPE4_INFO; + +/** A structure that describes a + PCC Subspace of type 5 (HW-Registers). + + ID: EArmObjPccSubspaceType5Info +*/ +typedef struct CmArmPccSubspaceType5Info { + /** Generic Pcc information. + + The Subspace of Type0 contains information that can be re-used + in other Subspace types. + + MaximumPeriodicAccessRate doesn't need to be populated for + this structure. + */ + PCC_SUBSPACE_GENERIC_INFO GenericPccInfo; + + /// Version. + UINT16 Version; + + /// Platform Interrupt. + CM_ARM_GENERIC_INTERRUPT PlatIrq; + + /// Command Complete Check Register. + /// The WriteMask field is not used. + PCC_MAILBOX_REGISTER_INFO CmdCompleteCheckReg; + + /// Error Status Register. + /// The WriteMask field is not used. + PCC_MAILBOX_REGISTER_INFO ErrorStatusReg; +} CM_ARM_PCC_SUBSPACE_TYPE5_INFO; + #pragma pack() #endif // ARM_NAMESPACE_OBJECTS_H_ diff --git a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c b/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c index 467b3072bf..5a01ed0fb8 100644 --- a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c +++ b/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c @@ -539,6 +539,101 @@ STATIC CONST CM_OBJ_PARSER CmArmCpcInfoParser[] = { { "NominalFrequencyInteger", 4, "0x%lx", NULL }, }; +/** A parser for the PCC_MAILBOX_REGISTER_INFO struct. +*/ +STATIC CONST CM_OBJ_PARSER CmArmMailboxRegisterInfoParser[] = { + { "Register", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE), NULL, NULL, + AcpiGenericAddressParser, ARRAY_SIZE (AcpiGenericAddressParser) }, + { "PreserveMask", 8, "0x%llx", NULL }, + { "WriteMask", 8, "0x%llx", NULL }, +}; + +/** A parser for the PCC_SUBSPACE_CHANNEL_TIMING_INFO struct. +*/ +STATIC CONST CM_OBJ_PARSER CmArmPccSubspaceChannelTimingInfoParser[] = { + { "NominalLatency", 4, "0x%x", NULL }, + { "MaxPeriodicAccessRate", 4, "0x%x", NULL }, + { "MinRequestTurnaroundTime", 2, "0x%x", NULL }, +}; + +/** A parser for EArmObjPccSubspaceType0Info. +*/ +STATIC CONST CM_OBJ_PARSER CmArmPccSubspaceType0InfoParser[] = { + { "SubspaceId", 1, "0x%x", NULL }, + { "Type", 1, "0x%x", NULL }, + { "BaseAddress", 8, "0x%llx", NULL }, + { "AddressLength", 8, "0x%llx", NULL }, + { "DoorbellReg", sizeof (PCC_MAILBOX_REGISTER_INFO), + NULL, NULL, CmArmMailboxRegisterInfoParser, + ARRAY_SIZE (CmArmMailboxRegisterInfoParser) }, + { "ChannelTiming", sizeof (PCC_SUBSPACE_CHANNEL_TIMING_INFO), + NULL, NULL, CmArmPccSubspaceChannelTimingInfoParser, + ARRAY_SIZE (CmArmPccSubspaceChannelTimingInfoParser) }, +}; + +/** A parser for EArmObjPccSubspaceType1Info. +*/ +STATIC CONST CM_OBJ_PARSER CmArmPccSubspaceType1InfoParser[] = { + { "GenericPccInfo", sizeof (PCC_SUBSPACE_GENERIC_INFO), + NULL, NULL, CmArmPccSubspaceType0InfoParser, + ARRAY_SIZE (CmArmPccSubspaceType0InfoParser) }, + { "PlatIrq", sizeof (CM_ARM_GENERIC_INTERRUPT), + NULL, NULL, CmArmGenericInterruptParser, + ARRAY_SIZE (CmArmGenericInterruptParser) }, +}; + +/** A parser for EArmObjPccSubspaceType2Info. +*/ +STATIC CONST CM_OBJ_PARSER CmArmPccSubspaceType2InfoParser[] = { + { "GenericPccInfo", sizeof (PCC_SUBSPACE_GENERIC_INFO), + NULL, NULL, CmArmPccSubspaceType0InfoParser, + ARRAY_SIZE (CmArmPccSubspaceType0InfoParser) }, + { "PlatIrq", sizeof (CM_ARM_GENERIC_INTERRUPT), NULL,NULL, + CmArmGenericInterruptParser, ARRAY_SIZE (CmArmGenericInterruptParser) }, + { "PlatIrqAckReg", sizeof (PCC_MAILBOX_REGISTER_INFO), + NULL, NULL, CmArmMailboxRegisterInfoParser, + ARRAY_SIZE (CmArmMailboxRegisterInfoParser) }, +}; + +/** A parser for EArmObjPccSubspaceType3Info or EArmObjPccSubspaceType4Info. +*/ +STATIC CONST CM_OBJ_PARSER CmArmPccSubspaceType34InfoParser[] = { + { "GenericPccInfo", sizeof (PCC_SUBSPACE_GENERIC_INFO), + NULL, NULL, CmArmPccSubspaceType0InfoParser, + ARRAY_SIZE (CmArmPccSubspaceType0InfoParser) }, + { "PlatIrq", sizeof (CM_ARM_GENERIC_INTERRUPT), NULL,NULL, + CmArmGenericInterruptParser, ARRAY_SIZE (CmArmGenericInterruptParser) }, + { "PlatIrqAckReg", sizeof (PCC_MAILBOX_REGISTER_INFO), + NULL, NULL, CmArmMailboxRegisterInfoParser, + ARRAY_SIZE (CmArmMailboxRegisterInfoParser) }, + { "CmdCompleteCheckReg", sizeof (PCC_MAILBOX_REGISTER_INFO), + NULL, NULL, CmArmMailboxRegisterInfoParser, + ARRAY_SIZE (CmArmMailboxRegisterInfoParser) }, + { "CmdCompleteUpdateReg", sizeof (PCC_MAILBOX_REGISTER_INFO), + NULL, NULL, CmArmMailboxRegisterInfoParser, + ARRAY_SIZE (CmArmMailboxRegisterInfoParser) }, + { "ErrorStatusReg", sizeof (PCC_MAILBOX_REGISTER_INFO), + NULL, NULL, CmArmMailboxRegisterInfoParser, + ARRAY_SIZE (CmArmMailboxRegisterInfoParser) }, +}; + +/** A parser for EArmObjPccSubspaceType5Info. +*/ +STATIC CONST CM_OBJ_PARSER CmArmPccSubspaceType5InfoParser[] = { + { "GenericPccInfo", sizeof (PCC_SUBSPACE_GENERIC_INFO), + NULL, NULL, CmArmPccSubspaceType0InfoParser, + ARRAY_SIZE (CmArmPccSubspaceType0InfoParser) }, + { "Version", 2, "0x%x",NULL }, + { "PlatIrq", sizeof (CM_ARM_GENERIC_INTERRUPT), NULL, NULL, + CmArmGenericInterruptParser, ARRAY_SIZE (CmArmGenericInterruptParser) }, + { "CmdCompleteCheckReg", sizeof (PCC_MAILBOX_REGISTER_INFO), + NULL, NULL, CmArmMailboxRegisterInfoParser, + ARRAY_SIZE (CmArmMailboxRegisterInfoParser) }, + { "ErrorStatusReg", sizeof (PCC_MAILBOX_REGISTER_INFO), + NULL, NULL, CmArmMailboxRegisterInfoParser, + ARRAY_SIZE (CmArmMailboxRegisterInfoParser) }, +}; + /** A parser for Arm namespace objects. */ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = { @@ -623,6 +718,18 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = { ARRAY_SIZE (CmArmMemoryRangeDescriptorInfoParser) }, { "EArmObjCpcInfo", CmArmCpcInfoParser, ARRAY_SIZE (CmArmCpcInfoParser) }, + { "EArmObjPccSubspaceType0Info", CmArmPccSubspaceType0InfoParser, + ARRAY_SIZE (CmArmPccSubspaceType0InfoParser) }, + { "EArmObjPccSubspaceType1Info", CmArmPccSubspaceType1InfoParser, + ARRAY_SIZE (CmArmPccSubspaceType1InfoParser) }, + { "EArmObjPccSubspaceType2Info", CmArmPccSubspaceType2InfoParser, + ARRAY_SIZE (CmArmPccSubspaceType2InfoParser) }, + { "EArmObjPccSubspaceType3Info", CmArmPccSubspaceType34InfoParser, + ARRAY_SIZE (CmArmPccSubspaceType34InfoParser) }, + { "EArmObjPccSubspaceType4Info", CmArmPccSubspaceType34InfoParser, + ARRAY_SIZE (CmArmPccSubspaceType34InfoParser) }, + { "EArmObjPccSubspaceType5Info", CmArmPccSubspaceType5InfoParser, + ARRAY_SIZE (CmArmPccSubspaceType5InfoParser) }, { "EArmObjMax", NULL, 0 }, }; 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