From efa12a3f029bd6ff4d2ada406c285f001b252907 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Antoine=20C=C5=93ur?= <coeur@gmx.fr>
Date: Thu, 11 Jul 2019 16:31:15 +0800
Subject: Revert "FmpDevicePkg: Fix various typos"
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This reverts commit f527942e6bdd9f198db90f2de99a0482e9be5b1b.
Commit message was incorrect.

Signed-off-by: Cœur <coeur@gmx.fr>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
---
 IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm')

diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm b/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm
index ebc91c41e4..e1886ea11b 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm
@@ -1,6 +1,6 @@
 ;------------------------------------------------------------------------------
 ;
-; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
 ; SPDX-License-Identifier: BSD-2-Clause-Patent
 ;
 ; Abstract:
@@ -46,7 +46,7 @@ ASM_PFX(InitializeFloatingPointUnits):
     fldcw    [ASM_PFX(mFpuControlWord)]
 
     ;
-    ; Use CpuId instruction (CPUID.01H:EDX.SSE[bit 25] = 1) to test
+    ; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
     ; whether the processor supports SSE instruction.
     ;
     mov     eax, 1
-- 
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