From f2cdb268ef04eeec51948b5d81eeca5cab5ed9af Mon Sep 17 00:00:00 2001 From: Chasel Chiu Date: Thu, 30 Apr 2020 09:28:35 +0800 Subject: IntelFsp2Pkg: Support Multi-Phase SiInit and debug handlers. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2698 To enhance FSP silicon initialization flexibility an optional Multi-Phase API is introduced and FSP header needs update for new API offset. Also new SecCore module created for FspMultiPhaseSiInit API New ARCH_UPD introduced for enhancing FSP debug message flexibility now bootloader can pass its own debug handler function pointer and FSP will call the function to handle debug message. To support calling bootloader functions, a FspGlobalData field added to indicate if FSP needs to switch stack when FSP running on separate stack from bootloader. Cc: Maurice Ma Cc: Nate DeSimone Cc: Star Zeng Signed-off-by: Chasel Chiu Reviewed-by: Nate DeSimone --- IntelFsp2Pkg/FspSecCore/SecMain.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'IntelFsp2Pkg/FspSecCore/SecMain.c') diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c b/IntelFsp2Pkg/FspSecCore/SecMain.c index 7169afc6c7..c8de52e1d5 100644 --- a/IntelFsp2Pkg/FspSecCore/SecMain.c +++ b/IntelFsp2Pkg/FspSecCore/SecMain.c @@ -1,6 +1,6 @@ /** @file - Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -221,6 +221,12 @@ SecTemporaryRamSupport ( UINTN CurrentStack; UINTN FspStackBase; + // + // Override OnSeparateStack to 1 because this function will switch stack to permanent memory + // which makes FSP running on different stack from bootloader temporary ram stack. + // + GetFspGlobalDataPointer ()->OnSeparateStack = 1; + if (PcdGet8 (PcdFspHeapSizePercentage) == 0) { CurrentStack = AsmReadEsp(); -- cgit v1.2.3