From d40965b9877135028673884abc8f5a9b6b0ef5dc Mon Sep 17 00:00:00 2001 From: Ted Kuo Date: Fri, 15 Apr 2022 01:37:38 -0700 Subject: IntelFsp2Pkg: Update FSP_GLOBAL_DATA and FSP_PLAT_DATA for X64 REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3893 Updated FSP_GLOBAL_DATA and FSP_PLAT_DATA structures to support both IA32 and X64. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Star Zeng Cc: Ashraf Ali S Signed-off-by: Ted Kuo Reviewed-by: Chasel Chiu Reviewed-by: Nate DeSimone --- IntelFsp2Pkg/FspSecCore/SecFsp.c | 2 +- IntelFsp2Pkg/Include/FspGlobalData.h | 53 +++++++++++++++++++++++++----------- 2 files changed, 38 insertions(+), 17 deletions(-) (limited to 'IntelFsp2Pkg') diff --git a/IntelFsp2Pkg/FspSecCore/SecFsp.c b/IntelFsp2Pkg/FspSecCore/SecFsp.c index 04b43c10d0..7fde6e7f41 100644 --- a/IntelFsp2Pkg/FspSecCore/SecFsp.c +++ b/IntelFsp2Pkg/FspSecCore/SecFsp.c @@ -130,7 +130,7 @@ FspGlobalDataInit ( ZeroMem ((VOID *)PeiFspData, sizeof (FSP_GLOBAL_DATA)); PeiFspData->Signature = FSP_GLOBAL_DATA_SIGNATURE; - PeiFspData->Version = 0; + PeiFspData->Version = FSP_GLOBAL_DATA_VERSION; PeiFspData->CoreStack = BootLoaderStack; PeiFspData->PerfIdx = 2; PeiFspData->PerfSig = FSP_PERFORMANCE_DATA_SIGNATURE; diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h b/IntelFsp2Pkg/Include/FspGlobalData.h index 2b534075ae..445540abfa 100644 --- a/IntelFsp2Pkg/Include/FspGlobalData.h +++ b/IntelFsp2Pkg/Include/FspGlobalData.h @@ -1,6 +1,6 @@ /** @file - Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.
+ Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -10,8 +10,9 @@ #include -#define FSP_IN_API_MODE 0 -#define FSP_IN_DISPATCH_MODE 1 +#define FSP_IN_API_MODE 0 +#define FSP_IN_DISPATCH_MODE 1 +#define FSP_GLOBAL_DATA_VERSION 1 #pragma pack(1) @@ -28,10 +29,11 @@ typedef enum { typedef struct { VOID *DataPtr; - UINT32 MicrocodeRegionBase; - UINT32 MicrocodeRegionSize; - UINT32 CodeRegionBase; - UINT32 CodeRegionSize; + UINTN MicrocodeRegionBase; + UINTN MicrocodeRegionSize; + UINTN CodeRegionBase; + UINTN CodeRegionSize; + UINTN Reserved; } FSP_PLAT_DATA; #define FSP_GLOBAL_DATA_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'D') @@ -42,15 +44,15 @@ typedef struct { UINT32 Signature; UINT8 Version; UINT8 Reserved1[3]; + /// + /// Offset 0x08 + /// UINTN CoreStack; + UINTN Reserved2; + /// + /// IA32: Offset 0x10; X64: Offset 0x18 + /// UINT32 StatusCode; - UINT32 Reserved2[8]; - FSP_PLAT_DATA PlatformData; - FSP_INFO_HEADER *FspInfoHeader; - VOID *UpdDataPtr; - VOID *TempRamInitUpdPtr; - VOID *MemoryInitUpdPtr; - VOID *SiliconInitUpdPtr; UINT8 ApiIdx; /// /// 0: FSP in API mode; 1: FSP in DISPATCH mode @@ -60,15 +62,34 @@ typedef struct { UINT8 Reserved3; UINT32 NumberOfPhases; UINT32 PhasesExecuted; + UINT32 Reserved4[8]; /// + /// IA32: Offset 0x40; X64: Offset 0x48 + /// Start of UINTN and pointer section + /// All UINTN and pointer members must be put in this section + /// except CoreStack and Reserved2. In addition, the number of + /// UINTN and pointer members must be even for natural alignment + /// in both IA32 and X64. + /// + FSP_PLAT_DATA PlatformData; + VOID *TempRamInitUpdPtr; + VOID *MemoryInitUpdPtr; + VOID *SiliconInitUpdPtr; + /// + /// IA32: Offset 0x64; X64: Offset 0x90 /// To store function parameters pointer /// so it can be retrieved after stack switched. /// VOID *FunctionParameterPtr; - UINT8 Reserved4[16]; + FSP_INFO_HEADER *FspInfoHeader; + VOID *UpdDataPtr; + /// + /// End of UINTN and pointer section + /// + UINT8 Reserved5[16]; UINT32 PerfSig; UINT16 PerfLen; - UINT16 Reserved5; + UINT16 Reserved6; UINT32 PerfIdx; UINT64 PerfData[32]; } FSP_GLOBAL_DATA; -- cgit v1.2.3