From c8ec22a266cdd134ac99c3021003710130613a40 Mon Sep 17 00:00:00 2001
From: jyao1 <jyao1>
Date: Tue, 29 Jul 2014 02:21:52 +0000
Subject: Add IntelFspPkg to support create FSP bin based on EDKII.

Contributed-under: TianoCore Contribution Agreement 1.0

Signed off by: Ravi Rangarajan <ravi.p.rangarajan@intel.com>
Reviewed by: Maurice Ma <maurice.ma@intel.com>
Reviewed by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Giri Mudusuru <giri.p.mudusuru@intel.com>
Reviewed by: Liming Gao <liming.gao@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15705 6f19259b-4bc3-4df7-8a09-765794883524
---
 IntelFspPkg/FspSecCore/FspSecCore.inf | 76 +++++++++++++++++++++++++++++++++++
 1 file changed, 76 insertions(+)
 create mode 100644 IntelFspPkg/FspSecCore/FspSecCore.inf

(limited to 'IntelFspPkg/FspSecCore/FspSecCore.inf')

diff --git a/IntelFspPkg/FspSecCore/FspSecCore.inf b/IntelFspPkg/FspSecCore/FspSecCore.inf
new file mode 100644
index 0000000000..d3ec2fc64f
--- /dev/null
+++ b/IntelFspPkg/FspSecCore/FspSecCore.inf
@@ -0,0 +1,76 @@
+## @file
+#
+#  Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution. The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php.
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = FspSecCore
+  FILE_GUID                      = 1BA0062E-C779-4582-8566-336AE8F78F09
+  MODULE_TYPE                    = SEC
+  VERSION_STRING                 = 1.0
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+#  VALID_ARCHITECTURES           = IA32
+#
+
+[Sources]
+  SecMain.c
+  SecMain.h
+  SecFsp.c
+  SecFsp.h
+
+[Sources.IA32]
+  Ia32/ResetVec.asm16 | MSFT
+  Ia32/Stack.asm  | MSFT
+  Ia32/InitializeFpu.asm  | MSFT
+  Ia32/FspApiEntry.asm  | MSFT
+
+  Ia32/Stacks.s | GCC
+  Ia32/InitializeFpu.s | GCC
+  Ia32/FspApiEntry.s | GCC
+
+[Binaries.Ia32]
+  RAW|Vtf0/Bin/ResetVec.ia32.raw |GCC
+
+[Binaries.X64]
+  RAW|Vtf0/Bin/ResetVec.x64.raw |GCC
+
+[Packages]
+  MdePkg/MdePkg.dec
+  IntelFspPkg/IntelFspPkg.dec
+
+[LibraryClasses]
+  BaseMemoryLib
+  DebugLib
+  BaseLib
+  PciCf8Lib
+  SerialPortLib
+  FspSwitchStackLib
+  FspCommonLib
+
+[Pcd]
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
+  gIntelFspPkgTokenSpaceGuid.PcdGlobalDataPointerAddress
+  gIntelFspPkgTokenSpaceGuid.PcdTemporaryRamBase
+  gIntelFspPkgTokenSpaceGuid.PcdTemporaryRamSize
+  gIntelFspPkgTokenSpaceGuid.PcdFspTemporaryRamSize
+
+[FixedPcd]
+  gIntelFspPkgTokenSpaceGuid.PcdFspMaxPatchEntry
+  gIntelFspPkgTokenSpaceGuid.PcdFspMaxPerfEntry
+
+[Ppis]
+  gEfiTemporaryRamSupportPpiGuid                # PPI ALWAYS_PRODUCED
+
-- 
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