From fd629ef6e3dc894ddcfefe21542190f26c8c5c65 Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Wed, 3 Jan 2024 11:13:47 +0530 Subject: MdePkg.dec: RISC-V: Define override bit for Sstc extension Define the BIT 1 as the override bit for Sstc extension. This will be used by the timer driver to decide whether to use SBI calls or direct CSR access to configure the timer. Cc: Liming Gao Cc: Michael D Kinney Cc: Zhiguang Liu Cc: Andrei Warkentin Signed-off-by: Sunil V L Reviewed-by: Andrei Warkentin --- MdePkg/MdePkg.dec | 2 ++ 1 file changed, 2 insertions(+) (limited to 'MdePkg/MdePkg.dec') diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec index 2ee112cc08..0459418906 100644 --- a/MdePkg/MdePkg.dec +++ b/MdePkg/MdePkg.dec @@ -2405,6 +2405,8 @@ # Configurability to override RISC-V CPU Features # BIT 0 = Cache Management Operations. This bit is relevant only if # previous stage has feature enabled and user wants to disable it. + # BIT 1 = Supervisor Time Compare (Sstc). This bit is relevant only if + # previous stage has feature enabled and user wants to disable it. # gEfiMdePkgTokenSpaceGuid.PcdRiscVFeatureOverride|0xFFFFFFFFFFFFFFFF|UINT64|0x69 -- cgit v1.2.3