From 244be783ae0407aa01f5b9db11d990a2e5d3212d Mon Sep 17 00:00:00 2001
From: "Wang, Sanyo" <sanyo.wang@intel.com>
Date: Tue, 29 Sep 2020 16:09:21 +0800
Subject: MdePkg: SMBIOS 3.4.0 Update "adding DDR5 definitions".

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2352

SMBIOS 3.4 spec adds new memory device types (DDR5, LPDDR5)

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Sanyo Wang <sanyo.wang@intel.com>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
---
 MdePkg/Include/IndustryStandard/SmBios.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

(limited to 'MdePkg')

diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include/IndustryStandard/SmBios.h
index ea23685851..f2db11f947 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1718,7 +1718,9 @@ typedef enum {
   MemoryTypeLpddr4                         = 0x1E,
   MemoryTypeLogicalNonVolatileDevice       = 0x1F,
   MemoryTypeHBM                            = 0x20,
-  MemoryTypeHBM2                           = 0x21
+  MemoryTypeHBM2                           = 0x21,
+  MemoryTypeDdr5                           = 0x22,
+  MemoryTypeLpddr5                         = 0x23
 } MEMORY_DEVICE_TYPE;
 
 ///
-- 
cgit v1.2.3