From 97be2801745630eab090446211289a6315040a30 Mon Sep 17 00:00:00 2001 From: Tycho Nightingale Date: Fri, 20 Jun 2014 07:18:08 +0000 Subject: PcAtChipsetPkg: Enable timer interrupt through I/O APIC Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Tycho Nightingale Reviewed-by: Elvin Li git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15576 6f19259b-4bc3-4df7-8a09-765794883524 --- PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'PcAtChipsetPkg/HpetTimerDxe') diff --git a/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c b/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c index b9bf080c74..e23a2c83e4 100644 --- a/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c +++ b/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c @@ -1,7 +1,7 @@ /** @file Timer Architectural Protocol module using High Precesion Event Timer (HPET) - Copyright (c) 2011, Intel Corporation. All rights reserved.
+ Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -594,6 +594,7 @@ TimerDriverSetTimerPeriod ( // Program IOAPIC register with APIC ID of current BSP in case BSP has been switched // IoApicConfigureInterrupt (mTimerIrq, PcdGet8 (PcdHpetLocalApicVector), IO_APIC_DELIVERY_MODE_LOWEST_PRIORITY, TRUE, FALSE); + IoApicEnableInterrupt (mTimerIrq, TRUE); } // -- cgit v1.2.3