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author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2014-08-08 08:33:01 +0000 |
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committer | Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> | 2014-08-08 08:33:01 +0000 |
commit | a8cf3620a42ca5927253822a813e3fbae1d6e7bf (patch) | |
tree | 64ff1e62b06ee89492c914e11c86b54ddf126b0c /82802ab.c | |
parent | 6697f71ade7b6428c7be6051c02dbb9768900e04 (diff) | |
download | flashrom-a8cf3620a42ca5927253822a813e3fbae1d6e7bf.tar.gz flashrom-a8cf3620a42ca5927253822a813e3fbae1d6e7bf.tar.bz2 flashrom-a8cf3620a42ca5927253822a813e3fbae1d6e7bf.zip |
Unify non-shifted and shifted JEDEC access
Some Parallel bus chips have a 16-bit mode and an 8-bit mode. They use
normal JEDEC addresses for 16-bit mode and shifted addresses (by 1 bit)
for 8-bit mode. Some programmers can access them in 16-bit mode, but on
all flashrom-supported programmers so far, we access them in 8-bit mode.
This means we have to shift the addresses but apart from the addresses
we can share the code.
This patch makes this possible by checking the chip's FEATURE_ADDR_SHIFTED
flag in common JEDEC functions and applying the right addresses respectively.
Corresponding to flashrom svn r1840.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Diffstat (limited to '82802ab.c')
-rw-r--r-- | 82802ab.c | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -44,7 +44,7 @@ int probe_82802ab(struct flashctx *flash) { chipaddr bios = flash->virtual_memory; uint8_t id1, id2, flashcontent1, flashcontent2; - int shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED) != 0; + int shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED) ? 1 : 0; /* Reset to get a clean state */ chip_writeb(flash, 0xFF, bios); |