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authorEdward O'Callaghan <quasisec@google.com>2020-12-02 13:17:46 +1100
committerFelix Singer <felixsinger@posteo.net>2022-09-29 17:02:20 +0000
commit464edef34f349fa783f7f5c640758b2fb8064d07 (patch)
tree4647062c7b8bf4e143efbcdaa4ee27ccfaa14400
parent326dc91cebbdaaaa02379cc1d3fd565fb678cb9c (diff)
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chipset_enable.c: Validate physmap() return rcrb value
Validate the physical mapping in enable_flash_silvermont(). Change-Id: Icc5a799a06b3f310d9a191fa5eb99b255b20d79d Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/48225 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/67853 Reviewed-by: Felix Singer <felixsinger@posteo.net>
-rw-r--r--chipset_enable.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/chipset_enable.c b/chipset_enable.c
index 6f75d6608..33abe0789 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -916,6 +916,8 @@ static int enable_flash_silvermont(struct pci_dev *dev, const char *name)
/* Handle GCS (in RCRB) */
void *rcrb = physmap("BYT RCRB", rcba, 4);
+ if (rcrb == ERROR_PTR)
+ return ERROR_FATAL;
enable_flash_ich_report_gcs(dev, ich_generation, rcrb);
physunmap(rcrb, 4);