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authorTristan Corrick <tristan@corrick.kiwi>2018-11-01 00:33:57 +1300
committerNico Huber <nico.h@gmx.de>2018-11-01 11:06:07 +0000
commitc4e9fd0abc51959885aafe6312a2d8c9b3935434 (patch)
treed04cdf7484dac323c64eff0ec80526d26e2f3aa5
parent61818dc098edf3bf41f2d6502456fe0cd078c007 (diff)
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chipset_enable.c: Mark Intel H81 as DEP
Tested on an ASRock H81M-HDS. The flash chip has been read, written, and erased many times without issue. Most boards with this chipset will have the ME region locked, hence the selection of DEP. Change-Id: I30aae956b2851c741e59403f5e49b80b5ba7c5e4 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/29391 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
-rw-r--r--chipset_enable.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/chipset_enable.c b/chipset_enable.c
index 22021a7c5..c1639a6af 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1849,7 +1849,7 @@ const struct penable chipset_enables[] = {
{0x8086, 0x8c59, NT, "Intel", "Lynx Point", enable_flash_pch8},
{0x8086, 0x8c5a, NT, "Intel", "Lynx Point", enable_flash_pch8},
{0x8086, 0x8c5b, NT, "Intel", "Lynx Point", enable_flash_pch8},
- {0x8086, 0x8c5c, NT, "Intel", "H81", enable_flash_pch8},
+ {0x8086, 0x8c5c, DEP, "Intel", "H81", enable_flash_pch8},
{0x8086, 0x8c5d, NT, "Intel", "Lynx Point", enable_flash_pch8},
{0x8086, 0x8c5e, NT, "Intel", "Lynx Point", enable_flash_pch8},
{0x8086, 0x8c5f, NT, "Intel", "Lynx Point", enable_flash_pch8},